• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.435-436
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• 2008

This paper presents a dual band frequency synthesizer for GSM and Wideband CDMA which is designed in a standard 0.13um CMOS 1P6M process. The shared components include phase frequency detector (PFD), charge pump (CP), loop filter, integer frequency divider(128/129 DMP, 4bit PC, 3bit SC) and Low noise Ring-VCO. A high-speed low power dual modulus prescaler is proposed to operate up to 2.1GHz at 3.3V supply voltage with 2mW power consumption by simulation. The simulated phase noise of VCO is -101dBc/Hz at 200kHz offset frequency from 1.9GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.11
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• pp.56-60
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• 2009

In this paper, a novel voltage controlled oscillator (VCO) has been presented by using the microstrip square multiple spiral resonator for reducing the phase noise of VCO. The microstrip multiple square resonator has the large coupling coefficient value, which makes a high Q value, and has reduced phase noise of VCO. The VCO with 1.8 V power supply has phase noise of -115.0~-117.34 dBc/Hz @100 kHz in the tuning range, 8.935~9.4 GHz. When it has been compared with microstrip square multiple spiral resonator and coventional spiral resonator, the reduced Q value has been -32.7 dB and -57.6 dB respectively. This low phase noise VCO could ve available to a VCO in X-band.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.37-40
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• 2003

The 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed for applications to the miniature repeater. The miniature dual-band repeater will be used at shopping mall, basements and underground parking lots. The in-loop 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed by designing Si BJT VCO and PLL loop circuits with Colpitts. The prototype of 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer of size 19${\times}$19${\times}$8(mm) has shown operating frequencies of 1.63㎓, 2.33㎓ ranges, RF output of 1dBm(PCS), 1dBm(IMT-2000), phase noise of -100 dBc/Hz(PCS), -95dBc/Hz(IMT-2000) at 10KHz offset, harmonics suppression of -24dB c(PCS), -15dBc(IMT-2000).

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.12
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• pp.84-89
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• 2010

In this paper, a novel voltage-controlled oscillator (VCO) using the microstrip square open loop dual split ring resonator is presented for reducing the phase noise. The square-shaped dual split ring resonator having the form of the microstrip square open loop is investigated to reduce the phase noise. Compared with the microstrip square open loop resonator and the microstrip square open loop split ring resonator as well as the conventional microstrip line resonator, the microstrip square dual split ring resonator has the larger coupling coefficient value, which makes a higher Q value, and has reduced the phase noise of VCO. The VCO with 1.7V power supply has the phase noise of -123.2~-122.0 dBc/Hz @ 100 kHz in the tuning range, 11.74~11.75 GHz. The figure of merit (FOM) of this VCO is-214.8~-221.7 dBc/Hz dBc/Hz @ 100 kHz in the same tuning range. Compared with VCO using the conventional microstrip line resonator, VCO using microstrip square open loop resonator, the phase noise of VCO using the proposed resonator has been improved in 26 dB, 10 dB, respectively.

• Journal of IKEEE
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• v.17 no.1
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• pp.16-21
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• 2013

Recently, frequency synthesizers are being designed in two ways narrow-band loop or dual-loop for wide-band to reduce the phase noise. However, dual-loop has the disadvantage of center frequency mismatch and requiring an extra loop. In this paper, we propose a new structure that supports a range of 800Mhz ~ 3Ghz with multiple control of the single-loop frequency synthesizer without another loop. The control voltage of the VCO(coarse, fine) will be fixed, and finally the VCO will have a low Kvco. The frequency synthesizer is simulated using UMC $0.11{\mu}m$ process, proposed frequency synthesizer can be used in a variety of applications in the future.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2001.11a
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• pp.235-238
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• 2001

단일 단말기로부터 멀티 통신이 가능하게 됨에 따라 광대역 또는 듀얼대역에서 사용되는 RF 소자 개발이 중요시되고 있다. 그러므로 소형, 저 비용의 멀티대역 VCO(Voltage Controlled Oscillator)개발이 요구된다. 본 논문에서 GSM/DCN 대역에서 사용 가능한 듀얼밴드 VCO을 설계하였다. 하나의 발진부, 듀얼 공진부, 완충증폭기, 스위치회로로 구성되었으며, 위상 보정 기법을 이용하여 각 밴드에 대한 발진 조건을 만족시키므로 사용 부품의 수를 줄일 수 있어 저 비용, 소형화, 낮은 위상잡음(phase noise)을 얻을 수 있다. 설계된 듀얼 VCO는 GSM 대역에서 -110dBc/Hz(100kHz offset) 이하의 위상 잡음과 DCN 대역에서 -108dBc/Hz(100kHz offset)의 위상 특성을 보인다. 출력전력은 0$\pm$3dBm이며 소비전력 7mA로 만족할만한 성능을 보인다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.1A
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• pp.134-141
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• 2007

This paper presents a frequency synthesizer(FS) for 5.2GHz/2.4GHz dual band wireless applications which is designed in a standard $0.18{\mu}m$ CMOS1P6M process. The 2.4GHz frequency is obtained from the 5.2GHz output frequency of Voltage Controlled Oscillator (VCO) by using the Switched Capacitor (SC) and the divider-by-2. Power dissipations of the proposed FS and VCO are 25mW and 3.6mW, respectively. The tuning range of VCO is 700MHz and the locking time is $4{\mu}s$. The simulated phase noise of PLL is -101.36dBc/Hz at 200kHz offset frequency from 5.0GHz with SCA circuit on.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.329-335
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• 2011

In this paper, a dual-band integer-N frequency divider is proposed for 2.4/5.2 GHz multi-standard wireless local area networks. It consists of a multi-modulus imbalance phase switching prescaler and two all-stage programmable counters. It is able to provide dual-band operation with high resolution while maintaining a low power consumption. This frequency divider is integrated with a 5 GHz VCO for multi-standard applications. Measurement results show that the VCO with frequency divider can work at 5.2 GHz with a total power consumption of 22 mW.

• Journal of IKEEE
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• v.11 no.1 s.20
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• pp.15-23
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• 2007

This paper describes a dual frequency synthesizer designed in a 0.2$\mu$m CMOS technology for wireless LAN applications. The design is focused mainly on low-power characteristics. Power dissipation is minimized especially in VCO and prescaler design. The designed synthesizer includes all building blocks for elimination of external components, other than the crystal. Its operating frequency can be programmed by external data. It operates in the frequency range of 2.3GHz to 2.7GHz (RF) and 250MHz to 800MHz (IF) and consumes 5.14mA at 2.5GHz and 1.08mA at 0.5GHz from a 2.5V supply. The measured phase noise is -85dBc/Hz in-band and -105dBc/Hz at 1MHz offset at IF band. The die area is 1.7mm$\times$1.7mm.

• Journal of IKEEE
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• v.2 no.1 s.2
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• pp.1-14
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• 1998

In this paper, Antenna, LNA, Mixer, VCO, and Modulation/Demodulation in Baseband processor which are the RF main components in Wireless LAN system for ultra high-speed communications network are studied. Antenna bandwidth and selective fading due to multipath can be major obstacles in high speed digital communications. To solve this problem, wide band MSA which has loop-structure magnetic antenna characteristics is designed. Distributed mixer using dual-gate GaAs MESFET can achieve over 10dB LO/RF isolation without hybrid, and minimize circuit size. As linear mixing signal is produced, distortions can be decreased at baseband signals. Conversion gain is achieved by mixing and amplification simultaneously. Mixer is designed to have wide band characteristics using distributed amplifier. In VCO design, Oscillator design method by large signal analysis is used to produce stable signal. Modulation/Demodulation system in baseband processor, DS/SS technique which is robust against noise and interference is used to eliminate the effect of multipath propagation. DQPSK modulation technique with M-sequences for wideband PN spreading signals is adopted because of BER characteristic and high speed digital signal transmission.