• Journal of the Microelectronics and Packaging Society
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• v.16 no.4
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• pp.1-4
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• 2009

This work shows how the adoption of a dual-dicing process for silicon wafer separation affects the thermal-cycling reliability (i.e. $-65^{\circ}C$ to $150^{\circ}C$) of the semiconductor devices utilizing lead-on-chip (LOC) die attach technique. In-situ examinations show that conventional single-dicing process directly attacks the edge region of diced devices but dual-dicing process effectively protects the edge region of diced devices from dicing-induced mechanical damage. Probably, this is because the preferential and sacrificial fracture of notched regions induced on the active surface of wafers saves the edge regions. It was also investigated through thermal-cycling tests that the number of thermal-cycling induced failures is much lower at the dual-dicing process than the single-dicing process.

• Nuclear Engineering and Technology
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• v.45 no.6
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• pp.821-826
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• 2013

In the present study, the effects of various heat treatments on the microstructure and mechanical properties of dual phase ODS steels were investigated to enhance the high strength at elevated temperature. Dual phase ODS steels have been designed by the control of ferrite and austenite formers, i.e., Cr, W and Ni, C in Fe-based alloys. The ODS steels were fabricated by mechanical alloying and a hot isostatic pressing process. Heat treatments, including hot rolling-tempering and normalizing-tempering with air- and furnace-cooling, were carefully carried out. It was revealed that the grain size and oxide distributions of the ODS steels can be changed by heat treatment, which significantly affected the strengths at elevated temperature. Therefore, the high temperature strength of dual phase ODS steel can be enhanced by a proper heat treatment process with a good combination of ferrite grains, nano-oxide particles, and grain boundary sliding.

• Journal of Mechanical Science and Technology
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• v.20 no.5
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• pp.652-657
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• 2006

Although many methods about the control of irregular external noise have been introduced and implemented, it is still necessary to design a controller that will be more effective and efficient methods to exclude for various noises. Accumulation of errors due to model tracking, internal noises (thermal noise, shot noise and 1/f noise) that come from elements such as resistor, diode and transistor etc. in the circuit system and numerical errors due to digital process often destabilize the system and reduce the system performance. New stochastic controller is adopted to remove those noises using conventional controller simultaneously. Design method of a model tracking dual controller is proposed to improve the stability of system while removing external and internal noises. In the study, design process of the model tracking dual stochastic controller is introduced that improves system performance and guarantees robustness under irregular internal noises which can be created internally. The model tracking dual stochastic controller utilizing F-P-K stochastic control technique developed earlier is implemented to reveal its performance via simulation.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.43 no.11
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• pp.952-962
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• 2015

Various types of altitude compensation nozzles have been investigated to develop an effective propulsion system. In order to obtain baseline data for future study of dual bell nozzles, main characteristics and key parameters of dual bell nozzles are summarized and described by analysing DLR dual bell nozzles. DLR's experimental researches show that inflection angle is proportional to transition NPR, and extension length is proportional to side load, but inversely proportional to transition NPR and transition duration. Therefore, the nozzle geometry can be determined through the performance prediction process and thus the optimization process is required to meet performance requirements between parameters.

• Bulletin of the Korean Chemical Society
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• v.34 no.10
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• pp.3039-3045
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• 2013

Dual-frequency ultrasound assisted photocatalysis (DUAP) method was proposed to degrade a stable organic model effluent, cresol red (CR), using the prepared $Fe^{3+}$-doped $TiO_2$ with active carbon fiber loading ($Fe^{3+}-TiO_2/ACF$) as photocatalyst. The influence of key factors, including Fe doping amount and power density of dual-frequency ultrasounds (20/40 kHz), on the degradation efficiency was investigated. The degradation efficiency rises to 98.7% in 60 min accompanied by the color removal of CR liquid samples from yellow to colorless transparent at optimal conditions. A synergy index of 1.40 was yielded by comparison with single ultrasound assisted photocatalysis (SUAP) and the photocatalysis without ultrasound assisted (UV/$TiO_2$), indicating that a clear synergistic effect exists for the DUAP process. Obvious enhancement of degradation efficiency for the DUAP process should be attributed to production of large amount of free radicals by strong cavitational effects of dual ultrasounds.

• Journal of Korean Society for Quality Management
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• v.42 no.4
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• pp.685-700
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• 2014

Purpose: The purpose of this paper is to develop a systematic weighting procedure based on process capability indices method applying weighted mean squared error minimization (WMSE) approach to dual response surface optimization. Methods: The proposed procedure consists of 5 steps. Step 1 is to prepare the alternative vectors. Step 2 is to rank the vectors based on process capability indices in a pairwise manner. Step 3 is to transform the pairwise rankings into the inequalities between the corresponding WMSE values. Step 4 is to obtain the weight value by calculating the inequalities. Or, step 5 is to obtain the weight value by minimizing the total violation amount, in case there is no weight value in step 4. Results: The typical 4 process capability indices, namely, $C_p$, $C_{pk}$, $C_{pm}$, $C_{pmk}$ are utilized for the proposed procedure. Conclusion: The proposed procedure can provide a weight value in WMSE based on the objective quality performance criteria, not on the decision maker's subjective judgments or experiences.

• Journal of Internet Computing and Services
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• v.11 no.4
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• pp.95-106
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• 2010

Recently multiple process communicate together. They share resource and information for cooperation in complicated programming environment. Kernel provides IPC (Inter -Process Communication) for communication with each other process. Shared Memory is a technique that many processes can access to identical memory area in the Linux environment. In this paper, we propose a performance improvement method of shared memory in the dual-core embedded linux system which is consist of different core and different operating system. We construct the MPC2530F (ARM926F+ARM946E) linux system and measure the performance therein. We attempt a performance enhancement in each CPU for each process which uses a shared memory.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.473-476
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• 1998

ULSI 소자에서 폴리사이드 구조를 사용하고 dual 게이트 산화막에 대한 공정 특성을 최적화 하는 2스텝 게이트 산화막의 형성 공정에 관한 연구를 하였다. 이러한 특성의 측정은 HP4145B 파라메터 분석기와 C-V meter 그리고 multi-frequency LcR meter를 사용하여 2스텝 산화막의 공정 방법과 cleaning에 따른 게이트 사화막의 공정 특성에 대한 연관 관계로 연구하였다. I-V 특성 면에서는 G$_{ox}$ 80.angs.의 경우 base 210.angs.의 경우에서는 dual 210.angs.의 특성이 base 210.angs.에 비하여 상대적으로 열화된 특성을 나타내었다. CCST 결과에서는 G$_{OX}$ 80.angs.과 210.angs.에서 dual 게이트 산화막의 cleaning 방법으로 piranha cl'n 과 SCl cl'n 방법에서 우수한 결과를 얻을 수 있었다. 또한 게이트 전압의 벼화량에 대한 결과에서는 dual 산화막의 경우 초기상태에서는 호울포획 현상이 나타나다가 이후에는 전자포획 현상이 나타나는 결과를 얻었다.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.2
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• pp.69-76
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• 2000

A dual-modulus prescaler divides the input signal by one of the moduli according to the control signal. In this paper, a new fast dual-modulus prescaler is proposed. The proposed prescaler has a ratioed-NOR structure different from a conventional ratioed-NAND structure. The proposed one can operate at a higher speed by using parallely connected NMOSs instead of using series-connected ones. HSPICE simulation results using HYUNDAI 0.65(m 2-poly 2-metal CMOS process parameters show that the maximum operating frequency of the proposed dual-modulus prescaler is 2.8㎓ with power consumption of 40.7㎽ at 5V supply voltage at $25^{\circ}C$. The proposed dual-modulus prescaler can be utilized for the frequency-synthesis in cellular radio front-ends.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.8
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• pp.1448-1455
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• 2008

This paper designs Shared Memory on the Dual Core system so that it operates a general System V IPC on the Linux O.S. Shared Memory is the technique that many processes can access to identical memory area. We treat Shared Memory in this paper among big two branches of Shared Memory which are SVR in a kernel step format. We design a share memory facility of Linux operating system on the Dual Core System. In this paper the suggesting design plan of share memory facility in Dual Core system is enhancing the performance in existing unity processor system as a dual core practical use. We attempt a performance enhance in each CPU for each process which uses a share memory.