• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.9C
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• pp.887-895
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• 2009

This paper proposes a cooperative power allocation with the use of partial channel information (e.g., the average signal-to-noise ratio (SNR) and transmit correlation) in multi-cell dual-hop multi-input single-output (MISO) relay systems. In a dual-hop MISO relay channel, it is desirable to allocate the transmit power between dual-hop links to maximize the end-to-end capacity. We consider the maximization of the end-to-end capacity of a dual-hop MISO relay channel under sum-power constraint. The proposed scheme adaptively allocates the transmit power considering the average channel gain of the target relay and the transmit correlation of the desired and inter-relay interference channel from adjacent relays. It is shown by means of upper-bound analysis that the end-to-end capacity can be maximized by making the angle difference of the principal eigenvectors of the desired and inter-relay interference channel orthogonal in highly-correlated channel environments. Finally, the performance of the proposed scheme is verified by computer simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.458-466
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• 2012

A Dual metal gate stack cylindrical/ surrounded gate MOSFET (DMGSA CGT/SGT MOSFET) has been proposed and an analytical model has been developed to examine the impact of this structure in suppressing short channel effects and in enhancing the device performance. It is demonstrated that incorporation of gate stack along with dual metal gate architecture results in improvement in short channel immunity. It is also examined that for DMGSA CGT/SGT the minimum surface potential in the channel reduces, resulting increase in electron velocity and thereby improving the carrier transport efficiency. Furthermore, the device has been analyzed at different bias point for both single material gate stack architecture (SMGSA) and dual material gate stack architecture (DMGSA) and found that DMGSA has superior characteristics as compared to SMGSA devices. The analytical results obtained from the proposed model agree well with the simulated results obtained from 3D ATLAS Device simulator.

• Journal of electromagnetic engineering and science
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• v.3 no.2
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• pp.140-146
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• 2003

In this paper, the design of a channel filter and its group-delay-and-amplitude equalizer is carried out for the Ka-band satellite transponder subsystem. The 8th order dual-mode filter is employed for high selectivity around the band-edges with an elliptic-integral function response and has an in-line configuration. The 2-pole, reflection-type, group-delay equalizer is designed and manufactured to reduce the group-delay and amplitude variation, which can be large for such a high order filter. It is noted that in both the filter and equalizer, adopting the dual-mode coupling mechanism leads to less mass and volume. Through measurement, the performance of the realized group-delay-equalized filter is shown to meet the equipment requirements and to be appropriate for the satellite input multiplexer.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.10
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• pp.53-59
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• 1997

In this paper, we present a 20 GHz low-loss dual-mode channel filter designed by using mode matching method. The performance of dual-mode channel filter mainly depends on iris characteristics. Therefore the exact design of iris is the key point to get good frequncy response of the filter. MOde matching technique is widely used ot design several kinds of waveguide filters because it is simple in theory and can easily calculate the scattering matrices at the discontinuities with simple structure like iris coupled filters. Additionally the effect for finite thickness of the iris in the dual-mode cavity iflter is analyzed by te full-wave method, providing the exact filter implementation without trial and error.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.260-264
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• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.342-344
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• 2005

We have simulated a symmetric dual-gate TFT which has triple floating n+ channel to improve the on-current of the dual-gate TFT. We achieved a low hole concentration at the source and channel junction causes the improvement the potential barrier so that we observed the reduction of the kink-effect. In this paper, we observed the reduction of the kink-effect compared with the conventional single-gate TFT and the improvement of the on-current compared with the conventional dual-gate TFT.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.3
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• pp.778-798
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• 2014

This paper proposes a novel exposed-terminal-eliminated medium access control (ETE-MAC) protocol by combining channel reservation, collision avoidance and concurrent transmissions to improve multi-access performance of the multihop wireless networks. Based on the proposed slot scheduling scheme, each node senses the control channel (CCH) or the data channel (DCH) to accurately determine whether it can send or receive the corresponding packets without collisions. Slot reservation on the CCH can be simultaneously executed with data packet transmissions on the DCH. Therefore, it resolves the hidden-terminal type and the exposed-terminal type problems efficiently, and obtains more spatial reuse of channel resources. Concurrent packet transmissions without extra network overheads are maximized. An analytical model combining Markov model and M/G/1 queuing theory is proposed to analyze its performance. The performance comparison between analysis and simulation shows that the analytical model is highly accurate. Finally, simulation results show that, the proposed protocol obviously outperforms the link-directionality-based dual-channel MAC protocol (DCP) and WiFlex in terms of the network throughput and the average packet delay.

• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.254-259
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• 2015

This paper reports the optimized mixed-signal performance of a high-voltage (HV) laterally double-diffused metaloxide-semiconductor (LDMOS) field-effect transistor (FET) with a dual gate oxide (DGOX). The fabricated device is based on the split-gate FET concept. In addition, the gate oxide on the source-side channel is thicker than that on the drain-side channel. The experiment results showed that the electrical characteristics are strongly dependent on the source-side channel length with a thick gate oxide. The digital and analog performances according to the source-side channel length of the DGOX LDMOS device were examined for circuit applications. The HV DGOX device with various source-side channel lengths showed reduced by maximum 37% on-resistance (R_ON) and 50% drain conductance (g_ds). Therefore, the optimized mixed-signal performance of the HV DGOX device can be obtained when the source-side channel length with a thick gate oxide is shorter than half of the channel length.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.4
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• pp.59-65
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• 2022

In this paper, a digital active phased array antenna is briefly introduced and beam forming method for a dual-channel side-lobe blanking applied to blank the side-lobe of the main beam is described. Next, the antenna performance was verified from results of design and antenna near-field measurement for the antenna main beam and side-lobe blanking beam. Then, a single-channel side-lobe blanking beam forming method was proposed to reduce the number of channels than the existing system operating dual-channel side-lobe blanking beam and weight distribution for each element of the side-lobe blanking antenna was designed with the proposed method. Finally, the designed single-channel side-lobe blanking beam pattern and blanking ability were verified and compared with the dual-channel side-lobe blanking beam. In addition, by comparing/verifying the conventional dual-channel and the proposed single-channel side-lobe blanking beam patterns measured through the receiving near-field test of the digital active phased array antenna and their ability to blank side-lobe of the main beam, validity of the proposed method for forming single-channel side-lobe blanking beam was confirmed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.3
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• pp.225-236
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• 2002

In this paper, to counteract a cross-polarization interference caused by co-channel dual polarization technique of digital radio relay system(DRRS), we analyze the theoretical model and digital design of cross-polarization interference canceller(XPIC). In addition a complex adaptive time domain equalizer(ATDE) is designed using a finite impulse response filter, and the structure of XPIC and its control method are also illustrated including ATDE. Our computer simulation shows that about 25 dB signature and more than 23 dB XPIC improvement factor can be obtained with XPIC and ATDE. In order to verify the operation of designed XPIC, we review the simulated results in view of tap number, algorithm convergence, system signature, and XPlC improvement factor in connection with 64-QAM DRRS with co-channel dual polarization.