• Title/Summary/Keyword: Dual bias control

검색결과 22건 처리시간 0.95초

An Analysis of the Heading Bias Effects in PNS using IMUs Attached to Shoes (신발에 IMU 를 장착한 PNS 에서 방위각 편차의 영향 분석)

  • Kim, SangSik;Yi, YearnGui;Park, Chansik
    • Journal of Institute of Control, Robotics and Systems
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    • 제19권11호
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    • pp.1053-1059
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    • 2013
  • Heading bias effects in PNS using IMUs attached to shoes are analyzed in this paper. The navigation algorithms of a single foot PNS where one IMU is attached to a foot and dual foot PNSs where two IMUs are attached to each foot are derived. Two navigation algorithms are proposed for the dual foot PNS: 1) the positions from the independent right and left foot PNSs are averaged to provide the final position, 2) the right and left foot PNSs are correlated and it provides positions of each foot. Furthermore, it is proven that two methods are equal. Using the derived navigation algorithms the effect of heading bias caused by a misalignment of the moving direction and IMU is analyzed. The analysis explains the position error of a single foot PNS is diverged while the heading bias is effectively compensated in dual foot PNSs because of the symmetry of heading biases. The experimental results confirm the analysis.

Research on PAE of Doherty Amplifier Using Dual Bias Control and PBG Structure (이중 바이어스 조절과 PBG를 이용한 도허티 증폭기 전력 효율 개선에 관한 연구)

  • Kim Hyoung-Jun;Seo Chul-Hun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • 제17권8호
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    • pp.707-712
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    • 2006
  • In this paper, dual bias control circuit and PBG(Photonic BandGap) structure have been employed to improve PAE(Power Added Effciency) of the Doherty amplifier on Input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed Doherty amplifier using dual bias controlled circuit and PBG has been improved the average PAE by 8%, $IMD_3$ by -5 dBc. And proposed Doherty amplifier has a high efficiency more than 30% on overall input power level, respectively.

Research on the Improvement of PAE and Linearity using Dual Bias Control and PBG Structure in Doherty Amplifier (포락선 검파를 통한 이중 바이어스 조절과 PBG를 이용한 도허티 증폭기 전력효율과 선형성 개선)

  • Kim, Hyoung-Jun;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • 제44권2호
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    • pp.76-80
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    • 2007
  • In this paper, the PAE (Power Added Efficiency) and the linearity of the Doherty amplifier has been improved using dual bias control and PBG (Photonic BandGap) structure. The PBG structure has used to implement on output matching circuit and dual bias control has applied to improve the PAE of the Doherty amplifier at a low input level by applying it to a carrier amplifier. The Doherty amplifier using the proposed structure has improved PAE by 8% and 5dBc of IMD3 (3rd Inter-Modulation Distortion) compared with those of the conventional class AB amplifier. In addition to, it has been evident that the designed the structure has showed more than a 30% increase in PAE for flatness over all input power level.

Grid-friendly Control Strategy with Dual Primary-Side Series-Connected Winding Transformers

  • Shang, Jing;Nian, Xiaohong;Chen, Tao;Ma, Zhenyu
    • Journal of Power Electronics
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    • 제16권3호
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    • pp.960-969
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    • 2016
  • High-power three-level voltage-source converters are widely utilized in high-performance AC drive systems. In several ultra-power instances, the harmonics on the grid side should be reduced through multiple rectifications. A combined harmonic elimination method that includes a dual primary-side series-connected winding transformer and selective harmonic elimination pulse-width modulation is proposed to eliminate low-order current harmonics on the primary and secondary sides of transformers. Through an analysis of the harmonic influence caused by dead time and DC magnetic bias, a synthetic compensation control strategy is presented to minimize the grid-side harmonics in the dual primary side series-connected winding transformer application. Both simulation and experimental results demonstrate that the proposed control strategy can significantly reduce the converter input current harmonics and eliminates the DC magnetic bias in the transformer.

A Low Distortion and Low Dissipation Power Amplifier with Gate Bias Control Circuit for Digital/Analog Dual-Mode Cellular Phones

  • Maeng, Sung-Jae;Lee, Chang-Seok;Youn, Kwang-Jun;Kim, Hae-Cheon;Mun, Jae-Kyung;Lee, Jae-Jin;Pyun, Kwang-Eui
    • ETRI Journal
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    • 제19권2호
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    • pp.35-47
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    • 1997
  • A power amplifier operating at 3.3 V has been developed for CDMA/AMPS dual-mode cellular phones. It consists of linear GaAs power MESFET's, a new gate bias control circuit, and an output matching circuit which prevents the drain terminal of the second MESF from generating the harmonics. The relationship between the intermodulation distortion and the spectral regrowth of the power amplifier has been investigated with gate bias by using the two-tone test method and the adjacent channel leakage power ratio (ACPR) method of CDMA signals. The dissipation power of the power amplifier with a gate bias control circuit is minimized to below 1000 mW in the range of the low power levels while satisfying the ACPR of less than -26 dBc for CDMA mode. The ACPR of the power amplifier is measured to be -33 dBc at a high output power of 26 dBm.

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Effects of Phase Difference between Voltage loaves Applied to Primary and Secondary Electrodes in Dual Radio Frequency Plasma Chamber

  • Kim, Heon-Chang
    • Journal of the Semiconductor & Display Technology
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    • 제4권2호
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    • pp.11-14
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    • 2005
  • In plasma processing reactors, it is common practice to control plasma density and ion bombardment energy by manipulating excitation voltage and frequency. In this paper, a dually excited capacitively coupled rf plasma reactor is self-consistently simulated with a three moment model. Effects of phase differences between primary and secondary voltage waves, simultaneously modulated at various combinations of commensurate frequencies, on plasma properties are investigated. The simulation results show that plasma potential and density as well as primary self-dc bias are nearly unaffected by the phase lag between the primary and the secondary voltage waves. The results also show that, with the secondary frequency substantially lower than the primary frequency, secondary self·do bias remains constant regardless of the phase lag. As the secondary frequency approaches to the primary frequency, however, the secondary self-dc bias becomes greatly altered by the phase lag, and so does the ion bombardment energy at the secondary electrode. These results demonstrate that ion bombardment energy can be more carefully controlled through plasma simulation.

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Bias-correction of Dual Polarization Radar rainfall using Convolutional Autoencoder

  • Jung, Sungho;Le, Xuan Hien;Oh, Sungryul;Kim, Jeongyup;Lee, GiHa
    • Proceedings of the Korea Water Resources Association Conference
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    • 한국수자원학회 2020년도 학술발표회
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    • pp.166-166
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    • 2020
  • Recently, As the frequency of localized heavy rains increases, the use of high-resolution radar data is increasing. The produced radar rainfall has still gaps of spatial and temporal compared to gauge observation rainfall, and in many studies, various statistical techniques are performed for correct rainfall. In this study, the precipitation correction of the S-band Dual Polarization radar in use in the flood forecast was performed using the ConvAE algorithm, one of the Convolutional Neural Network. The ConvAE model was trained based on radar data sets having a 10-min temporal resolution: radar rainfall data, gauge rainfall data for 790minutes(July 2017 in Cheongju flood event). As a result of the validation of corrected radar rainfall were reduced gaps compared to gauge rainfall and the spatial correction was also performed. Therefore, it is judged that the corrected radar rainfall using ConvAE will increase the reliability of the gridded rainfall data used in various physically-based distributed hydrodynamic models.

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Investigation of Dual-Spin Turn and Attitude Acquisition of Satellite (위성의 Dual-Spin Turn 방법 분석 및 자세획득)

  • Seo, Hyeon-Ho
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • 제34권2호
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    • pp.36-47
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    • 2006
  • The process of dual spin turn maneuver is introduced for attitude acquisition or recovery from flat spin state of a satellite. The physical principle of momentum transfer during dual spin turn is explained clearly. The case studies of special dual spin turn, in addition to the conventional dual spin turn, that are known as an acceptable cases, are performed to investigate the principle of dual spin turn and to provide a physical insight as well as the solution of dual spin turn. This study is done based on case-study simulation, which includes two-state control scheme composed of open-loop maneuver and energy dissipation device. Furthermore, we investigate the stability for the verification of all control cases after implementing two-stage control. We also provide the simulation scenario of flat spin recovery using dual spin turn method as an example.

Feasibility Study of Non-volatile Memory Device Structure for Nanometer MOSFET (나노미터 MOSFET비휘발성 메모리 소자 구조의 탐색)

  • Jeong, Ju Young
    • Journal of the Semiconductor & Display Technology
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    • 제14권2호
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    • pp.41-45
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    • 2015
  • From 20nm technology node, the finFET has become standard device for ULSI's. However, the finFET process made stacking gate non-volatile memory obsolete. Some reported capacitor-less DRAM structure by utilizing the FBE. We present possible non-volatile memory device structure similar to the dual gate MOSFET. One of the gates is left floating. Since body of the finFET is only 40nm thick, control gate bias can make electron tunneling through the floating gate oxide which sits across the body. For programming, gate is biased to accumulation mode with few volts. Simulation results show that the programming electron current flows at the interface between floating gate oxide and the body. It also shows that the magnitude of the programming current can be easily controlled by the drain voltage. Injected electrons at the floating gate act similar to the body bias which changes the threshold voltage of the device.

Threshold Voltage Control of Pentacene Thin-Film Transistor with Dual-Gate Structure

  • Koo, Jae-Bon;Ku, Chan-Hoe;Lim, Sang-Chul;Lee, Jung-Hun;Kim, Seong-Hyun;Lim, Jung-Wook;Yun, Sun-Jin;Yang, Yong-Suk;Suh, Kyung-Soo
    • Journal of Information Display
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    • 제7권3호
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    • pp.27-30
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    • 2006
  • This paper presents a comprehensive study on threshold voltage $(V_{th})$ control of organic thin-film transistors (OTFTs) with dual-gate structure. The fabrication of dual-gate pentacene OTFTs using plasma-enhanced atomic layer deposited (PEALD) 150 nm thick $Al_{2}O_{3}$ as a bottom gate dielectric and 300 nm thick parylene or PEALD 200 nm thick $Al_{2}O_{3}$ as both a top gate dielectric and a passivation layer was investigated. The $V_{th}$ of OTFT with 300 nm thick parylene as a top gate dielectric was changed from 4.7 V to 1.3 V and that with PEALD 200 nm thick $Al_{2}O_{3}$ as a top gate dielectric was changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode was changed from -10 V to 10 V. The change of $V_{th}$ of OTFT with dual-gate structure was successfully investigated by an analysis of electrostatic potential.