• Journal of the Korean Geotechnical Society
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• v.33 no.10
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• pp.25-31
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• 2017

The buffer is one of the major components of an engineered barrier system (EBS) for the disposal of high-level radioactive waste (HLW). As the buffer is located between a disposal canister and host rock, it is indispensable to assure the disposal safety of high-level radioactive waste. It can restrain the release of radionuclide and protect the canister from the inflow of groundwater. Since high quantity of heat from a disposal canister is released to the surrounding buffer, thermal properties of the buffer are very important parameters for the analysis of the entire disposal safety. Especially, temperature criteria of the compacted bentonite buffer can affect the design of HLW repository facility. Therefore, this paper investigated thermal properties for the Kyungju compacted bentonite buffer which is the only bentonite produced in South Korea. Hot wire method and dual probe method were used to measure thermal conductivity and specific heat capacity of the compacted bentonite buffer according to the temperature variation. Thermal conductivity and specific heat capacity were decreased dramatically when temperature variation was between $22^{\circ}C{\sim}110^{\circ}C$ as degree of saturation decreased according to the temperature variation. However, there was little variation under the high temperature condition at $110^{\circ}C{\sim}150^{\circ}C$.

• Bulletin of the Korean Chemical Society
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• v.32 no.9
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• pp.3437-3442
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• 2011

An on-line flow injection analysis with dual pre-concentration method was developed to determine the ultra trace tri and hexavalent chromium in water. In this system, the cation and anion pre-concentration columns were combined with a 10-port injection valve and then used to separate and concentrate Cr (III) and Cr (VI) selectively. The two species of concentrated chromium were sequentially eluted and determined by using HCl-KCl buffer of pH 1.8 as an eluent. Cr (III) was oxidized by hydrogen peroxide to Cr (VI). It was detected spectrophotometrically at 548 nm by complexation with DPC (diphenylcarbazide). Several factors such as concentration of $H_2O_2$, DPC and coil length in reaction condition were optimized. The linear range for Cr (III) and Cr (VI) was 0.1-50 ${\mu}g$/L. The limit of detections ($3{\sigma}$) of Cr (III) and Cr (VI) were 52 ng/L and 44 ng/L under the optimized FIA system, and their recoveries 98% and 103%, respectively. This method was applied to analyze contamination level of chromium species in tap water, groundwater and bottled water.

• Journal of IKEEE
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• v.27 no.4
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• pp.683-686
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• 2023

In this paper, we designed a Delayed Dual Core Lock-Step (D-DCLS) processor where two cores operate same instructions with delay and the result is compared to mitigate soft errors and common mode failures in automotive electronic systems. Because D-DCLS does not know which core an error occurred in, each core must be recovered to the point before the error occurred, but complex hardware modifications are required to return all intermediate values on the pipeline stage. In this paper, in order for easy hardware implementation, all register values are saved to a buffer whenever a branch instruction is executed. When an error is detected, the saved register values are automatically restored, and then 'BX LR' instruction is executed to return to the last branch point. The proposed D-DCLS processor was designed using Verilog HDL and was confirmed to continue normal operation after automatically recovering error.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.726-729
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• 2013

In this paper, low power and high slew rate CMOS rail to rail input/output opamp applicable for ouput buffer amp, in LCD source driver IC, is proposed. Proposed op-amp, is realized the characteristics of low power consumption and high slew rate adding the newly designed control stage of class-B to the conventional output stage of class-AB. From the simulation results, we know that the proposed opamp buffer can drive a 1000pF capacitive load with a 6.5V/us slew-rate, while drawing only the the power consumption of 1.19mW from 3.3V power supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.3
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• pp.55-61
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• 2000

This paper presents an efficient hardware architecture of frame memory interface in MPEG-2 video encoder. To reduce the size of memory buffers between SDRAM and the frame memory module, the number of clocks needed for each memory access is minimized with dual bank operation and burst length change. By allocating the remaining cycles not used by SDRAM access, to the random access cycle, the internal buffer size, the data bus width, and the size of the control logic can be minimized. The proposed architecture is operated with 54MHz clock and designed with the VT $I^{тм}$ 0.5 ${\mu}{\textrm}{m}$ CMOS TLM standard cell library. It is verified by comparing the test vectors generated by the c-code model with the simulation results of the synthesized circuit. The buffer area of the proposed architecture is reduced to 40 % of the existing architecture.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.3
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• pp.101-108
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• 2009

Since the use of wireless communication instruments was standardized, users expect to be provided with seamless information whenever and wherever they use the instruments. Also, some technology is required to satisfy the users' needs which will cover their mobility. To support the mobility of host, the Internet Engineering Task Force (lETF) Mobile IP Working Group proposed a protocol called MIPv6 (Mobile IPv6). But in the case of the existing MIPv6, sometimes Mobile Node cannot receive data packet if Handover occurs although it is a temporal phenomenon. For solving these Handover problems, there are many methods like FMIPv6 (Fast Handover for Mobile IPv6) and HMIPv6 (Hierarchical Mobile IPv6) have been suggested. This paper suggested the use of Dual Buffer of Access Point and an effective way of registration as a way of reducing delayed time caused by Handover. Also, it analyzed and compare the existing MIPv6 with a proposed scheme concerning delayed time of Handover. Finally, the main objective of this paper is to proposed scheme that can reduce the delayed time of Handover compare to the existing MIPv6.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.27-36
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• 2006

Conventional delay-insensitive (DI) data encodings usually require 2N+1 wires for transferring N-bit. To reduce complexity and power dissipation of wires in designing a large scaled chip, an encoder and a decoder circuits, where N-bit data transfer can be peformed with only N+l wires, are proposed. These circuits are based on a quasi delay-insensitive (QDI) model and designed by using current-mode multiple valued logic (CMMVL). The effectiveness of the proposed data transfer mechanism is validated by comparisons with conventional data transfer mechanisms using dual-rail and 1-of-4 encodings through simulation at the 0.25 um CMOS technology. In general, simulation results with wire lengths of 4 mm or larger show that the CMMVL scheme significantly reduces delay-power product ($D{\ast}P$) values of the dual-rail encoding with data rate of 5 MHz or more and the 1-of-4 encoding with data rate of 18 MHz or more. In addition, simulation results using the buffer-inserted dual-rail and 1-of-4 encodings for high performance with the wire length of 10 mm and 32-bit data demonstrate that the proposed CMMVL scheme reduces the D*P values of the dual-rail encoding with data rate of 4 MHz or more and 1-of-4 encoding with data rate of 25 MHz or more by up to $57.7\%\;and\;17.9\%,$ respectively.

• Korean Journal of Culture and Social Issue
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• v.26 no.4
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• pp.551-578
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• 2020

The purpose of this study is to identify the moderating effect of each of the three stress response (problem-centered treatment, pursuit of social support, and positive thinking) in the effect of work-family conflict between dual-earner couples on marriage satisfaction. To this end, 369 married couples (369 wives, 369 husbands) who raise children under the age of 6 were surveyed on stress coping (problem-centered, social support, and positive thinking), work-family conflicts, and marriage satisfaction. Based on the Actor-Partner Interdependence Model (APIM), the collected data verified six research models by distinguishing the moderating effects of each of the three coping strategies from the direction of Work to Family conflict and Family to Work conflict. Interaction graphs were also presented to determine the pattern of significant buffering effects. As a result, first of all, the problem-oriented strategy of the wife buffer the negative impact of the husband's WFC on the husband's own and wife's marriage satisfaction. It was also found that problem-oriented strategy that husband himself uses to buffer the negative impact of the husband's FWC on his wife's marriage satisfaction. Second, the pursuit of social support confirmed that the negative effects of the husband's WFC on the husband's marriage satisfaction were mitigated by the pursuit of social support used by his wife. Third, in the case of positive thinking, the effect of the positive thinking on the husband's WFC on the marriage satisfaction of the husband and wife was shown, and the positive response effect of the wife's FWC conflict was also shown. Finally, based on the results of this study, the discussion and implications of the study were presented.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.3 s.357
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• pp.43-51
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• 2007

OneNAND flash combines the advantages of NAND and NOR flash, and has become an alternative to the former. But the advanced features of OneNAND flash are not utilized effectively in demand paging systems designed for NAND flash. We propose delayed dual buffering, a demand paging system which fully exploits the random-access I/O interface and dual page buffers of OneNAND flash demand paging system. It effectively reduces the time of page transfer from the OneNAND page buffer to the main memory. On average, it achieves and 28.5% reduction in execution time and 4.4% reduction in paging system energy consumption.

• Analytical Science and Technology
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• v.34 no.4
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• pp.143-152
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• 2021

Capillary electrophoresis (CE) is an effective technique to study chiral recognition because it offers flexibility in adjusting vital factors. Currently, various available cyclodextrins (CDs) can be employed for the chiral separation of numerous analytes. Herein, we investigate the enantioseparation behavior of lipoic acid enantiomers in various types of single and dual CD systems through CE. Additionally, several impacted CE parameters were optimized through the systematic investigation based on the design of experiment (DoE) concept for a single system comprising a heptakis (2,3,6-tri-O-methyl)-β-CD and a dual system containing the combination of the single CD with a sulfated-β-CD. Consequently, absolute enantioresolution was obtained within 15 min on a common standard bare fused-silica capillary (64.5/56 cm in total/effective length, 50/365 ㎛ inner/outer diameter), maintained at 15 ℃ and at an applied voltage of 24 kV. The optimal background electrolyte consisted of 6 mM heptakis (2,3,6-tri-O-methyl)-β-CD dissolved in the solution of 58 mM borate buffer at pH 10. Furthermore, the results of apparent binding constant experiments indicated that the S-enantiomer-heptakis (2,3,6-tri-O-methyl)-β-CD complex exhibited a stronger affinity than its R-enantiomer counterpart. The obtained electrophoretic mobility values could be utilized to interpret the resolution achieved at various CD concentrations and the mobility behavior of the complexes elucidated the migration order of the enantiomers in an electropherogram.