• Title/Summary/Keyword: Driver circuit

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A study on Multi-level PDP sustain circuit with reduced device voltage stresses (내압이 절감된 Multi-level PDP 구동회로에 관한 연구)

  • Yoon, Seok;Kim, Bum-Joon;Song, Seok-Ho;Roh, Chung-Wook;Hong, Sung-Soo;SaKong, Sug-Chin
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.93-95
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    • 2005
  • A new energy-recovery- sustain circuit suitable for a Plasma Display Panel(PDP) application is proposed. The proposed circuit features the low device voltage stresses, essential to design a power efficient and low cost PDP driver circuit. The proposed circuit is demonstrated experimentally for driving a 42 inches plasma display panel.

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The Latest Poly-Si TFT Circuit Technologies for System-On-Glass LCD

  • Nakajima, Yoshiharu;Maki, Yasuhito
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.69-74
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    • 2004
  • System-on-glass technology made with low temperature poly-Si TFT has been rapidly advancing in recent years. We have developed a low-power, narrow edged frame, 1.9inch system-on-glass LCD which fully integrates a 16-bit RGB interface driver and all power circuits required for driving the LCD. In this paper, the latest poly-Si TFT circuit technologies used in the newly developed LCD are discussed. The development trends are also reviewed.

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A 200MHz high speed 16M SDRAM with negative delay circuit (부지연 회로를 내장한 200MHz 고속 16M SDRAM)

  • 김창선;장성진;김태훈;이재구;박진석;정웅식;전영현
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.4
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    • pp.16-25
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    • 1997
  • This paper shows a SDRAM opeating in 200MHz clock cycle which it use data interleave and pipelining for high speed operation. We proposed NdC (Negative DEaly circuit) to improve clock to access time(tAC) characteristics, also we proposed low power WL(wordline)driver circit and high efficiency VPP charge-pump circit. Our all circuits has been fabricated using 0.4um CMOS process, and the measured maximum speed is 200Mbytes/s in LvTTL interface.

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Low Power, Small Chip-size Mobile AM-LCD Drivers Using Time-sharing Output Architecture

  • Kudo, Y.;Eriguchi, T.;Akai, A.;Yokota, Y.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.854-857
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    • 2005
  • We developed new circuit architecture for reducing the power consumption and chip-size of driver ICs. In this paper we describe a new drive scheme, based on the concept of time -sharing output and optimal circuit design based on color resolution. In case of 132 x 176-pixel class, we used only 8 O p-A mps for a 262-k color display.

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A High Slew-rate Two-stage OP-AMP for TFT-LCD Driver ICs (TFT-LCD 구동회로를 위한 High Slew-rate Two-stage OP-AMP)

  • 유용수;권모경
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1011-1014
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    • 2003
  • We proposed a new two-stage operational amplifier that increases the slew rate by adding some simple circuitry to the conventional structure. The proposed circuit is simulated by HSPICE and the slew rate of the proposed circuit is improved more than 10 times than that of conventional one in slewing state without considerable increments in area and power consumption.

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A Study on the Efficiency of a High Power Factor LED Driver Circuit (고역률 LED 구동회로의 효율화에 관한 연구)

  • Lee, Dong Won;Kim, Byungcheul
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.8
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    • pp.629-634
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    • 2013
  • The rectified voltage supplied to LED lamp is used in load and then the surplus voltage can be produced in LED lighting. In this case, LED lighting is proposed that can recyclable the excess voltage to supply power to the controller.

Analysis IGBT gate Surge voltage characterization by stray inductance (기생 인덕턴스에 의한 게이트 서지 전압 특성분석)

  • Lee, Gun Ho
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.285-286
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    • 2014
  • Recently, the unipolar gate power source is preferred in inverter system because of cost reduction reason. In this case, designer uses 0V source for turning-off the switching devices instead of negative voltage at Vee source. If the gate driver circuit has some stray inductance, the gate voltage would happen a surge voltage. This paper analyzes that of stray inductance effect during the switching behavior in the circuit and the proposed solutions were verified by pulse test.

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A study on the Drive Circuit Design in the Power Line Communication (PLC에서의 구동회로설계에 관한 연구)

  • Choi, Tae-Seop;Lim, Seung-Ha
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.1301-1304
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    • 2005
  • In this paper, we used class D amplification circuit proposed to improve the decline of error rate caused by rapidly variable impedance in the Power Line Communication. We manufactured voltage drive circuit and current drive circuit that are driven circuit of power line modem on the present. And with the same power line modem, we made a comparison experiment applying the driver circuit that used class D amplifier proposed in this paper. As a result of Experiment, We showed that it has more superior than other existing drive circuits at the impedance change in the power line communication.

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A Simple ZVZCS Sustain Driver for a Plasma Display Panel

  • Yi Kang-Hyun;Han Sang-Kyoo;Choi Seong-Wook;Kim Chong-Eun;Moon Gun-Woo
    • Journal of Power Electronics
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    • v.6 no.4
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    • pp.298-306
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    • 2006
  • A high efficiency and low cost sustain driver for a plasma display panel (PDP) utilizing a current pumping method is proposed. The main concept of the proposed circuit is using the current source to charge and discharge the panel. As a result, all power switches can achieve zero voltage switching (ZVS) and every auxiliary switch can also achieve zero current switching (ZCS). Since the inductor current can compensate for the discharge current, the current stress of all the power switches can be reduced considerably. Furthermore, it has features such as a simpler structure, less mass, lower cost, and lower electromagnetic interference than in previous circuits.

High Speed InP HBT Driver Ie For Laser Modulation

  • Sung Jung Hoon;Burm Jin Wook
    • Proceedings of the IEEK Conference
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    • 2004.08c
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    • pp.883-884
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    • 2004
  • High-speed IC for time-division multiplexing (TDM) optical transmission systems have been designed and fabricated by using InP heterojunction-bipolar-transistor (HBT) technology. The driver IC was developed for driving external modulators, featuring differential outputs and the operation speed up to 10 Gbps with an output voltage swing of 1.3 Vpp at each output which was the limit of the measurement. Because -3 dB frequency was 20GHz, this circuit will be operated up to 20Gbps. 1.3Vpp differential output was achieved by switching 50 mA into a 50 $\Omega$ load. The power dissipation of the driver IC was 1W using a single supply voltage of -3.5Y. Input md output return loss of the IC were better than 10 dB and 15 dB, respectively, from DC to 20GHz. The chip size of fabricated IC was $1.7{\Box}1.2 mm^{2}$.

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