• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2000년도 특별강연 및 춘계학술발표대회 개요집
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• pp.99-102
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• 2000

Conventionally, ZVS FB DC/DC converter was controlled by monolithic IC UC3879, which includes the functions of oscillator, error amplifier and phase-shift circuit. Also, microprocessor and DSP have been widely used for the remote control and for the immediate waveform control in ZVS FB DC/DC converter. However the conventional microprocessor controller is complex and difficult to control because the controller consists of analog and digital parts. In the case of the control of FB DC/DC converter, the output is required of driving a direct signal to the switch drive circuits by the digital controller. So, this paper presents the method and realization of designing the digital-to-phase shift PWM circuit controlled by DSP (TMX320C32) in a 2,500A, 40㎾ WS FB DC/DC converter.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권1호
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• pp.1-10
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• 2007

In recent few years, low-power electronics has been a leading drive for technology developments nourished by rapidly growing market share. Mobile DRAM, as a fundamental block of hand-held devices, is now becoming a product developed by limitless competition. To support application specific mobile features, various new power-reduction schemes have been proposed and adopted by standardization. Tightened power budget in battery-operated systems makes conventional schemes not acceptable and increases difficulty of the circuit design. The mobile DRAM has successfully moved down to 1.5V era, and now it is about to move to 1.2V. Further voltage scaling, however, presents critical problems which must be overcome. This paper reviews critical issues in mobile DRAM design and various circuit schemes to solve the problems. Focused on analog circuits, bitline sensing, IO line sensing, refresh-related schemes, DC bias generation, and schemes for higher data rate are covered.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권4호
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• pp.561-567
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• 2017

This paper presents a 4-channel common-cathode VCSEL driver array operating up to 6.25 Gb/s per channel for the applications of HDMI 2.0 active optical cables. The proposed VCSEL driver consists of an input buffer, a modified Cherry-Hooper amplifier as a pre-driver, and a main driver with pre-emphasis to drive a common-cathode VCSEL diode at high-speed full switching operations. Particularly, the input buffer merges a linear equalizer not only to broaden the bandwidth, but to reduce power consumption simultaneously. Measured results of the proposed 4-channel VCSEL driver array implemented in a $0.13-{\mu}m$ CMOS process demonstrate wide and clean eye-diagrams for up to 6.25-Gb/s operation speed with the bias current 2.0 mA and the modulation currents of $3.1mA_{PP}$. Chip core occupies the area of $0.15{\times}0.1{\mu}m^2$ and dissipate 22.8 mW per channel.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1991년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 22-24 Oct. 1991
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• pp.809-814
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• 1991

기존의 CNC Controller를 재구성하면 제어성과 절삭성의 재고에 큰 효과를 낼 수 있다. 현실적으로 시스템의 재구성은, 가) 시스템의 재구성으로 2축 CNC 기계를 다축으로 전환시킬 수 있고, 나) 모터의 직접제어에 의한 G-code 작성과정의 생략이 가능하며, 다) NC 동작의 제어가 소프트웨어로 (C 언어) 이루어 지기 때문에 사용자환경에 맞도록 고객화가 가능한 강점이 있다. 나아가서는 형상의 정의에서 NC 기계동작의 제어 및 온라인 모니터링에 이르는 전과정을 소프트웨어로 일식화 시킬 수 있는 통합 NC 시스템의 구현이 가능하다. 본 논문에서는 이러한 목적으로 연구되고 있는 INCS(Integrated NC System)의 개발현황을 소개한다. INCS는 PC-286, NC Controller, Drive Amplifier, Sensing Device의 하드웨어 시스템과 CAD, CAM 및 CNC 기능을 수행하는 소프트웨어 시스템으로 구성되어 있다. 그래픽 시뮬레이션 및 실제 절삭을 통하여 개발된 방식의 유효성과 효율성을 설명한다.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2009년도 춘계학술대회 논문집
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• pp.639-644
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• 2009

This research is concerned with the application of the active linear actuator to the active vibration control of structure. The active linear actuator will be mounted on the sub-frame so that it can cancel the excitation transferred from the engine. Accelerometer mounted on the sub-frame detects the vibration and its signal is fed into the DSP controller where the control algorithm is installed. The output of the DSP controller is connected to the driver which amplifies the DSP output. In general, the pulse width modulation power amplifier is used to drive the voice-coil type actuator. This study shows the dynamic characteristics of the active linear actuator and active vibration control experimental results.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2003년도 춘계학술대회 논문집
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• pp.494-497
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• 2003

A rotating device driven by an Inchworm motor was designed and fabricated to be used as an angie standard system. 1. PZT was adopted as a driving source, while the movement of PZT was guided by the leaf spring employing the elastic transformation of metals. 2. The device could rotate in a 360-degree arc. continuously Performance test of the device showed about 0.02 sec. of the minimum revolution angle and 1/15 rpm of the maimum revolution speed. 3. To improve its performance requires further studies on realizing a shifting device with faster response time, on increasing the output current (capacity) of the power amplifier used to drive PZT, on the dynamic motion of clamping. and on determining the optimum clamping condition

• 소음진동
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• 제2권1호
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• pp.49-59
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• 1992

The motion analysis of a translation device driven by a piezoelectric actuator is performed to identify the mechanics of impact drive mechanism and to find the maximum speed waveform. The translation device is modeled as a semidefinite two-degree-of-freedom system. The motion analysis includes effects of friction force between moving mass and contact surface, dynamics of voltage amplifier and piezoelectric elements, and hysteresis of piezoelectric actuator. Base on the model, simulation studies are carried out and then compared with experimental results. It is found that the error between moving distances obtained by analysis and experiment is less than 15% and that the actual motion of moving mass is well predicted by the analytical work, finally, precision positioning experiments are carried out by using a proximity sensor as a feedback sensor. Position control of moving mass is initiated by the maximum speed waveform and finely tuned by the scaled down waveform so that accurate positioning is accomplished within the resolution of the sensor.

• International journal of advanced smart convergence
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• 제11권2호
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• pp.53-58
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• 2022

In this paper, w-band frequency synthesizer was developed for frequency-modulated continuous wave (FMCW) radar sensors. To achieve a small size and high performance, We designed and manufactured w-band MMIC chips such as up-converter one-chip, multiplier, DA (Drive Amplifier) MMIC(Monolithic Microwave Integrated Circuit), etc. And interposer technology was applied between the W-band multiplier and the DA MMIC chip. As a result, the measured phase noise was -106.10 dBc@1MHz offset, and the frequency switching time of the frequency synthesizer was less than 0.1 usec. Compared with the w-band frequency synthesizer using purchased chips, the developed frequency synthesizer showed better performance.

• 전기전자학회논문지
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• 제22권2호
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• pp.408-412
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• 2018

이 논문에서는 40nm CMOS 공정을 이용하여 제작된 26GHz 가변 이득 증폭기에 대한 연구를 수행하였다. 79GHz를 사용하는 자동차 레이더의 경우 주파수 특성상 회로 전체를 79GHz로 설계 및 매칭 하기 보다는 Down conversion 하여 낮은 주파수대역으로 구동하거나 Up conversion 전에 낮은 주파수 대역을 이용하는 것이 설계 및 구동에 유리하다. 실제적으로 TTD(True Time Delay)를 통해 시간지연을 이용하는 Phased Array System 의 경우에도 현재 기술로는 낮은 주파수로 Down conversion하는 것이 오차를 줄이고 실제적 시간지연을 구현하는데 좋다. 79GHz 주파수의 1/3인 26GHz 주파수 대역에서 동작하는 VGA(Variable Gain Amplifier)에 대하여 설계하였고 1-stage의 cascode amplifier 형태로 구성된 회로에서 VDD : 1V, Bias 0.95V, S11은 < -9.8dB(Mea. High gain mode), S22 <-3.6dB(Mea. High gain mode), Gain : 2.69dB(Mea. High gain mode), P1dB : -15 dBm (Mea. High gain mode) 로 설계되었다. Low gain mode 에서는 S11은 < -3.3dB(Mea. Low gain mode), S22 < -8.6dB(Mea. Low gain mode), Gain : 0dB(Mea. Low gain mode), P1dB : -21 dBm (Mea. Low gain mode)로 설계되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권1호
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• pp.126-142
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• 2016

This paper presents a wide-frequency-range, low-power transceiver with an automatic impedance-matching calibration for TV-white-space (TVWS) application. The wide-range automatic impedance matching calibration (AIMC) is proposed for the Drive Amplifier (DA) and LNA. The optimal $S_{22}$ and $S_{11}$ matching capacitances are selected in the DA and LNA, respectively. Also, the Single Pole Double Throw (SPDT) switch is integrated to share the antenna and matching network between the transmitter and receiver, thereby minimizing the systemic cost. An N-path filter is proposed to reject the large interferers in the TVWS frequency band. The current-driven mixer with a 25% duty LO generator is designed to achieve the high-gain and low-noise figures; also, the frequency synthesizer is designed to generate the wide-range LO signals, and it is used to implement the FSK modulation with a programmable loop bandwidth for multi-rate communication. The TVWS transceiver is implemented in $0.13{\mu}m$, 1-poly, 6-metal CMOS technology. The die area of the transceiver is $4mm{\times}3mm$. The power consumption levels of the transmitter and receiver are 64.35 mW and 39.8 mW, respectively, when the output-power level of the transmitter is +10 dBm at a supply voltage of 3.3 V. The phase noise of the PLL output at Band 2 is -128.3 dBc/Hz with a 1 MHz offset.