• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.537-538
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• 2008

A step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in 0.18um CMOS standard process. In an effort to improve low load efficiency, this paper proposes the PFM (Pulse Frequency modulation) voltage mode 1MHz switching frequency step-down DC-DC converter with on-chip compensation. Capacitor multiplier method can minimize error amplifier compensation block size by 20%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87% for the output voltage of 1.8V (input voltage : 3.3V), maximum load current 500mA, and 0.14% output ripple voltage. The total core chip area is $mm^2$.

• 전력전자학회논문지
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• 제22권4호
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• pp.345-352
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• 2017

In this paper, a non-dissipative snubber for reducing the switching losses in the step down converter is proposed. The conventional step down converter, e.g., buck converter, suffers from serious switching losses and consequentially heat generation because of its hard switching. Thus, it is unsuitable for high switching frequency operation. Reduction of the reactive components' size, such as an output inductor and capacitor, is difficult. The proposed snubber can slow down the increasing current slopes and switch voltage at turn-on and turn-off transients, thereby significantly reducing the switching loses. Additionally, the slowly increasing current during switch turn-on transition, can effectively solve the output rectifier diode reverse recovery problem. Therefore, the proposed non-dissipative snubber not only leads to the efficiency of converter operation at high switching frequency but also reduces the reactive components size in proportion to the switching frequency. To confirm the validity of the proposed circuit, theoretical analysis and experimental results from a 150 W, 1 MHz prototype are presented.

• 한국산학기술학회논문지
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• 제13권2호
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• pp.801-807
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• 2012

본 논문에서는 LC 필터 기술을 기반으로 하는 주파수 단일 하향 변환기를 설계 및 제작하였다. 설계한 단일 하향 변환기는 저잡음 증폭기, 혼합기 IF 증폭기, LC 필터로 구성하였으며 DC block 커패시터와 RF bypass 커패시터로 구성된다. 설계한 변환기는 IC를 LC 필터로 대치하여 전력을 감소시키고 제작비용을 낮추어주는 효과를 보인다. 본 논문에서 설계, 제작한 단일 하향 변환기는 이득이 약 10dBm이고 70MHz에서 18MHz의 대역폭을 실현하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 통신소사이어티 추계학술대회논문집
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• pp.273-276
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• 2003

In this paper, we designed and made up/down converter (UDC) for using W-CDMA digital pre-distortion system which is one of the efficiency enhancement techniques. UDC is required that frequency up(baseband to RF) and down(RF to baseband) of information signals. The focus of the design and PCB layout is to satisfy the linearity of the UDC. We tested that UDC was satisfied specification which is based on 3GPP base stations and repeaters. The ACLR results which are -51.84dBc(Up Converter) and -55.0dBc(Down Converter) at upper 5 MHz offset from center-frequency show that UDC satisfy the 3GPP specification with superior linearity data.

• 전기전자학회논문지
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• 제12권1호
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• pp.34-42
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• 2008

This paper proposes a new on-chip voltage down converter(VDC), which employs a new reference voltage generator(RVG). The converter adopts a temperature-independence reference voltage generator, and a voltage-up converter. The architecture of the proposed VDC has a high-precision, and it was verified based on a 0.25${\mu}m$ 1P5M standard CMOS technology. For 2.5V to 1.0V conversion, the RVG circuit has a good characteristics such as temperature dependency of only 0.2mV/$^{\circ}C$, and the voltage-up circuit has a good voltage deviation within ${\pm}$0.12% for ${\pm}$5% variation of supply voltage VDD. The output voltage is stabilized with ${\pm}$1mV for load current varying from 0 to 100mA.

• Journal of Power Electronics
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• 제14권2호
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• pp.203-216
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• 2014

In the conventional dc-dc converter, a pair of additional diode and the adjacent passive component capacitor/inductor can be added to the circuit with an X-shape connection, which generates a family of new topologies. The novel circuits, also called diode-assisted dc-dc converter, enhance the voltage boost/buck capability and have a great potential for high step-up/step-down power conversions. This paper mainly investigates and compares conventional dc-dc converter and diode-assisted dc-dc converter in wide range power conversion from the aspects of silicon devices, passive components requirements, electro-magnetic interference (EMI) and efficiency. Then, a comprehensive comparison example of a high step-up power conversion system was carried out. The two kinds of boost dc-dc converters operate under the same operation conditions. Mathematical analysis and experiment results verify that diode-assisted dc-dc converters are very promising for simultaneous high efficiency and high step-up/step-down power conversion in distributed power supply systems.

• 한국전기전자재료학회논문지
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• 제22권7호
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• pp.555-558
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• 2009

This paper presents a step-down converter IC for automotive applications. This device was designed for a 40 V/1 A high-power output for voltage reference of automotive IC. It provides 250kHz PWM (pulse width modulation) and PFM(pulse frequency modulation) according to load conditions. This device was simulated spectre of IC-design-tools and fabricated Dong-bu Hitec 0.35um BD350BA process.

• 전기전자학회논문지
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• 제7권2호
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• pp.135-143
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• 2003

본 논문에서는 다치논리(Multiple-Valued Logic : MVL)를 위한 데이터 변환기의 설계방법에 대해서 논의한다. 3.3 v의 단일 전원의 4 디지트의 CMOS 아날로그 4치 변환기(Analog to Quaternary Converter : AQC)와 4치 아날로그 변환기(Quaternary to Analog Converter)를 뉴런모스를 사용한 다운리터럴회로(Down-Literal Circuit : DLC)를 사용하여 설계하였다. 뉴런모스 다운리터럴회로는 제안된 AQC와 QAQ가 4개의 전압 레벨값을 출력과 입력으로 사용하게 하며, 소자의 다중 문턱전압 특성을 갖게한다. 제안된 AQC -QAC 회로는 구조면에서 전전력 소모의 특성을 갖는다.

• 한국산업융합학회 논문집
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• 제24권5호
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• pp.641-644
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• 2021

Wearable devices and IoT are being utilized in various fields, where all systems are developing in the direction of multi-functionality, low power consumption, and high speed. In this paper, we propose a DC -DC Step-down C onverter for IoT smart devices. The proposed DC -DC Step-down converter is composed of a control block of the power supply stage. It also consists of an overheat protection circuit, under-voltage protection circuit, an overvoltage protection circuit, a soft start circuit, a reference voltage circuit, a lamp generator, an error amplifier, and a hysteresis comparator. The proposed DC-DC converter was designed and fabricated using a Magnachip / Hynix 180nm CMOS process, 1-poly 6-metal, the measured results showed a good match with the simulation results.

• Journal of Power Electronics
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• 제17권6호
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• pp.1445-1453
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• 2017

In this study, a new zero-voltage transition (ZVT) buck converter with coupled inductor using a synchronous rectifier and a lossless clamp circuit is proposed. The regular buck converter with tapped inductor has extended duty cycle for high step-down applications. However, the leakage inductance of the coupled inductor produced considerable voltage spikes across the switch. A lossless clamp circuit is used in the proposed converter to overcome this problem. The freewheeling diode was replaced with a synchronous rectifier to reduce conduction losses in the proposed converter. ZVT conditions at turn-on and turn-off instants were provided for the main switch. The synchronous rectifier switch turned on under zero-voltage switching, and the auxiliary switch turn-on and turn-off were under zero-current condition. Experimental results of a 100 W-100 kHz prototype are provided to justify the validity of the theoretical analysis. Moreover, the conducted electromagnetic interference of the proposed converter is measured and compared with its hard-switching counterpart.