• Title/Summary/Keyword: Doubling attack

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New Simple Power Analysis on scalar multiplication based on sABS recoding (sABS 형태의 스칼라 곱셈 연산에 대한 새로운 단순전력 공격)

  • Kim, Hee-Seok;Kim, Sung-Kyoung;Kim, Tae-Hyun;Park, Young-Ho;Lim, Jong-In;Han, Dong-Guk
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.17 no.2
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    • pp.115-123
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    • 2007
  • In cryptographic devices like a smart-card whose computing ability and memory are limited, cryptographic algorithms should be performed efficiently. Scalar multiplication is very important operation in Elliptic Curve Cryptosystems, and so must be constructed in safety against side channel attack(SCA). But several countermeasures proposed against SCA are exposed weaknesses by new un-dreamed analysis. 'Double-and-add always scalar multiplication' algorithm adding dummy operation being known to secure against SPA is exposed weakness by Doubling Attack. But Doubling Attack cannot apply to sABS receding proposed by Hedabou, that is another countermeasure against SPA. Our paper proposes new strengthened Doubling Attacks that can break sABS receding SPA-countermeasure and a detailed method of our attacks through experimental result.

Simple Countermeasure to Cryptanalysis against Unified ECC Codes

  • Baek, Yoo-Jin
    • Journal of Communications and Networks
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    • v.12 no.1
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    • pp.1-4
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    • 2010
  • As a countermeasure to simple power attack, the unified point addition codes for the elliptic curve cryptosystem were introduced. However, some authors proposed a different kind of power attacks to the codes. This power attack uses the observation that some internal operations in the codes behave differently for addition and doubling. In this paper, we propose a new countermeasure against such an attack. The basic idea of the new countermeasure is that, if one of the input points of the codes is transformed to an equivalent point over the underlying finite field, then the code will behave in the same manner for addition and doubling. The new countermeasure is highly efficient in that it only requires 27(n-1)/3 extra ordinary integer subtractions (in average) for the whole n-bit scalar multiplication. The timing analysis of the proposed countermeasure is also presented to confirm its SPA resistance.

Side-Channel Attacks on Square Always Exponentiation Algorithm (Square Always 멱승 알고리듬에 대한 부채널 공격)

  • Jung, Seung-Gyo;Ha, Jae-Cheol
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.24 no.3
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    • pp.477-489
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    • 2014
  • Based on some flaws occurred for implementing a public key cryptosystem in the embedded security device, many side-channel attacks to extract the secret private key have been tried. In spite of the fact that the cryptographic exponentiation is basically composed of a sequence of multiplications and squarings, a new Square Always exponentiation algorithm was recently presented as a countermeasure against side-channel attacks based on trading multiplications for squarings. In this paper, we propose Known Power Collision Analysis and modified Doubling attacks to break the Right-to-Left Square Always exponentiation algorithm which is known resistant to the existing side-channel attacks. And we also present a Collision-based Combined Attack which is a combinational method of fault attack and power collision analysis. Furthermore, we verify that the Square Always algorithm is vulnerable to the proposed side-channel attacks using computer simulation.

A Blinding-Based Scalar Multiplication Algorithm Secure against Power Analysis Attacks (전력분석공격에 대한 블라인딩 기반의 상수배 알고리즘)

  • Kim, Chang-Kyun;Ha, Jae-Cheol;Moon, Sang-Jae
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.17 no.3
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    • pp.117-121
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    • 2007
  • Most existing countermeasures against classical DPA are vulnerable to new DPA, e.g., refined power analysis attack (RPA), zero-value point attack (ZPA), and doubling attack. More recently, Mamiya et al proposed a new countermeasure (so-called BRIP) against RPA, ZPA, classical DPA and SPA. This countermeasure, however, also has a vulnerability of scalar multiplication computations by exploiting specially chosen input message. Therefore, to prevent various power analysis attacks like DPA and new SPA, we propose an enhanced countermeasure by developing a new random blinding technique.

Mathematical Modelling for the Transmission Dynamics of HIV infection and AIDS (HIV감염과 AIDS의 전파특성에 관한 수학적 모델화)

  • Chung, Hyeng-Hwan;Joo, Seok-Min;Chung, Mun-Gyu;Lee, Kwang-Woo
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.2
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    • pp.89-95
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    • 1999
  • This study investigates the population model of the spread of HIV/AIDS which the infection is generated by an infectious individual in a population of susceptible. A mathematical model is presented for the transmission dynamics of HIV infection within the communities of homosexual males. The pattern on the epidemic character of HIV, the causative agent of AIDS, was analysed by the mathematical model of AIDS system which is derived according to the ecological relationship between five epidemilogic states of individuals. The computer simulation was performed using real data and the following conclusions are drawn on the basis of the simulations. 1. The model structure and the algorithm described n the thesis is good. 2. In proportion to increase Ro, the population of AIDS patient increases and the time of its widespread reaches earlier. 3. The AIDS patients will be maximum between 7 and 21 years after an attack of AIDS and widespread between 10 and 20 years. 4. Considering the properties of the incubation periods, the maximum number of infected person is increased, and the attack rate is decreased.

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Subspace-based Power Analysis on the Random Scalar Countermeasure (랜덤 스칼라 대응기법에 대한 부분 공간 기반 전력 분석)

  • Kim, Hee-Seok;Han, Dong-Guk;Hong, Seok-Hie;Yi, Ok-Yeon
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.1
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    • pp.139-149
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    • 2010
  • Random scalar countermeasures, which carry out the scalar multiplication by the ephemeral secret key, against the differential power analysis of ECIES and ECDH have been known to be secure against various power analyses. However, if an attacker can find this ephemeral key from the one power signal, these countermeasures can be analyzed. In this paper, we propose a new power attack method which can do this analysis. Proposed attack method can be accomplished while an attacker compares the elliptic curve doubling operations and we use the principle component analysis in order to ease this comparison. When we have actually carried out the proposed power analysis, we can perfectly eliminate the error of existing function for the comparison and find a private key from this elimination of the error.

Hardware Design of Elliptic Curve processor Resistant against Simple Power Analysis Attack (단순 전력분석 공격에 대처하는 타원곡선 암호프로세서의 하드웨어 설계)

  • Choi, Byeong-Yoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.1
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    • pp.143-152
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    • 2012
  • In this paper hardware implementation of GF($2^{191}$) elliptic curve cryptographic coprocessor which supports 7 operations such as scalar multiplication(kP), Menezes-Vanstone(MV) elliptic curve cipher/decipher algorithms, point addition(P+Q), point doubling(2P), finite-field multiplication/division is described. To meet structure resistant against simple power analysis, the ECC processor adopts the Montgomery scalar multiplication scheme which main loop operation consists of the key-independent operations. It has operational characteristics that arithmetic units, such GF_ALU, GF_MUL, and GF_DIV, which have 1, (m/8), and (m-1) fixed operation cycles in GF($2^m$), respectively, can be executed in parallel. The processor has about 68,000 gates and its simulated worst case delay time is about 7.8 ns under 0.35um CMOS technology. Because it has about 320 kbps cipher and 640 kbps rate and supports 7 finite-field operations, it can be efficiently applied to the various cryptographic and communication applications.

RFID Authenticated Encryption Scheme of Multi-entity by Elliptic Curve's Coordinates (타원곡선 좌표계를 이용한 RFID 다중객체 간 인증 암호기법)

  • Kim, Sung-Jin;Park, Seok-Cheon
    • Journal of Internet Computing and Services
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    • v.9 no.3
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    • pp.43-50
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    • 2008
  • Authenticated Encryption scheme in RFID system is the important issue for ID security. But, implementing authenticated Encryption scheme in RFID systems is not an easy proposition and systems are often delivered for reasons of complexity, limited resources, or implementation, fail to deliver required levels of security. RFID system is so frequently limited by memory, performance (or required number of gates) and by power drain, that lower levels of security are installed than required to protect the information. In this paper, we design a new authenticated encryption scheme based on the EC(Elliptic Curve)'s x-coordinates and scalar operation. Our scheme will be offers enhanced security feature in RFID system with respect to user privacy against illegal attack allowing a ECC point addition and doubling operation.

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A small-area implementation of cryptographic processor for 233-bit elliptic curves over binary field (233-비트 이진체 타원곡선을 지원하는 암호 프로세서의 저면적 구현)

  • Park, Byung-Gwan;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.7
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    • pp.1267-1275
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    • 2017
  • This paper describes a design of cryptographic processor supporting 233-bit elliptic curves over binary field defined by NIST. Scalar point multiplication that is core arithmetic in elliptic curve cryptography(ECC) was implemented by adopting modified Montgomery ladder algorithm, making it robust against simple power analysis attack. Point addition and point doubling operations on elliptic curve were implemented by finite field multiplication, squaring, and division operations over $GF(2^{233})$, which is based on affine coordinates. Finite field multiplier and divider were implemented by applying shift-and-add algorithm and extended Euclidean algorithm, respectively, resulting in reduced gate counts. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 49,271 gate equivalents (GEs), and the estimated maximum clock frequency is 345 MHz. One scalar point multiplication takes 490,699 clock cycles, and the computation time is 1.4 msec at the maximum clock frequency.