• Title/Summary/Keyword: Double-circuit transmission line

Search Result 63, Processing Time 0.031 seconds

Comparative Study on Transient Stability Improving Capability of Series and Shunt Compensation (비용함수에 의한 직병렬보상장치의 과도안정도 향상 특성 비교)

  • Choi, Kyu-Hyoung;Jeoug, Chang-Yang;Oh, Tae-Kyoo
    • Proceedings of the KIEE Conference
    • /
    • 1996.07b
    • /
    • pp.655-657
    • /
    • 1996
  • The objective of this paper is to compare the series and shunt approaches of controlled reactive power compensation to improve power system transient stabilities. Including main circuit considerations of series and shunt compensators, application aspects are thought to have major impacts on efficiency and economy of the installation of the compensators. The concept is studied by means of EMTP simulations on one machine-Infinite Bus Test System which consists of a 612MVA steam turbin generator and transformer and double circuit 345KV transmission line. Idealized dynamic models of Thyristor Controlled Series Compensation and Shunt Compensation are used for the comparative study of the series and shunt compensation approach to damp power system oscillations.

  • PDF

Isolation Circuits Based on Metamaterial Transmission Lines for Multiplexers(Invited Paper)

  • Lee, Hanseung;Itoh, Tatsuo
    • Journal of electromagnetic engineering and science
    • /
    • v.13 no.3
    • /
    • pp.141-150
    • /
    • 2013
  • Multiplexers based on isolation circuits made of metamaterial lines are proposed and studied. The new approach provides unique advantageous features beneficial to system designer. For instance, there is no need to modify the filters used in multiplexers. Also, the design process is straightforward. In this paper, two types of multiplexers based on metamaterial isolation circuits are presented, and their operation concepts are explained. Also, theories and design process of isolation circuits are presented to help readers design and fabricate proposed multiplexers. For verifying the concepts, two types of triplexers and two types of quadruplexers are designed and fabricated. All filters used in the multiplexers are commercial surface acoustic wave filters. The measured results are well matched with the simulation results.

Estimation of Fault Location on Transmission Lines using Current Phasor (전류 페이저를 이용한 송전선로 고장점 추정 알고리즘)

  • Yeo, Sang-Min;Kim, Chul-Hwan
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.58 no.11
    • /
    • pp.2095-2100
    • /
    • 2009
  • Since most of the Extra High Voltage (EHV) transmission lines are untransposed and multi-circuits, errors are occurred inevitably because of the unbalanced impedances of the lines and so on. Therefore, a distance relaying algorithm applicable to the untransposed multi-circuits transmission lines needs to be developed. The proposed algorithm of fault location estimation in the paper uses the fundamental phasor to reduce the effects of the harmonics. This algorithm also analyzes the second-order difference of the phasor to calculate the traveling times of waves generated by faults. The traveling time of the waves generated by faults is derived from the second-order difference of the phasor. Finally, the distance from the relaying point to the faults is estimated using the traveling times. To analyze the performance of the algorithm, a power system with the EHV untransposed double-circuit transmission lines are modeled and simulated under various fault conditions such as several fault types, fault locations, fault inception angles and fault resistances. The results of the simulations show that the proposed algorithm has the capability to estimate the fault locations quickly and accurately.

A Fabrication of 128K$\times$8bit SRAM Multichip Package (128K$\times$8bit SRAM 메모리 다중칩 패키지 제작)

  • Kim, Chang-Yeon;Jee, Yong
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.31A no.3
    • /
    • pp.28-39
    • /
    • 1994
  • We experimented on memory multichip modules to increase the packing density of memory devices and to improve their electrical characteristics. A 128K$\times$8bit SRAM module was made of four 32K$\times$8bit SRAM memory chips. The memory multichip module was constructed on a low-cost double sided PCB(printed circuit boared) substrate. In the process of fabricating a multichip module. we focused on the improvement of its electrical characteristics. volume, and weight by employing bare memory chips. The characteristics of the bare chip module was compared with that of the module with four packaged chips. We conducted circuit routing with a PCAD program, and found the followings: the routed area for the module with bare memory chips reduced to a quarter of that area for module with packaged memory chips. 1/8 in volume, 1/5 in weight. Signal transmission delay times calculated by using transmission line model was reduced from 0.8 nsec to 0.4 nsec only on the module board, but the coupling coefficinet was not changed. Thus, we realized that the electrical characteristics of multichip packages on PCB board be improved greatly when using bare memory chips.

  • PDF

Measurement and Analysis of Electric and Magnetic Fields near 345[kV] Transmission Tower (345[kV] 송전철탑 주변에서 전장과 자장의 측정과 분석)

  • 이복희;이승칠;안창환;길형준;전덕규;길경석
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.12 no.3
    • /
    • pp.14-21
    • /
    • 1998
  • In this paper, the measurements of ELF electric and magnetic fields due to double circuit 345[kV} transmission lines are made using planar-type electric field sensor and multitum loop-type magnetic field sensor, and the magnitudes of electric and magnetic fields are illustrated by a three-dimensional plot. Also, in order to predict the magnetic field strength with lad variation, a typical daily load current curves of the transmission lines are displayed because the magnetic field is changed with load current. experimental results of ELF electric and magnetic fields along center line versus lateral distance are compared with the theoretical values computed by using the FIELDS program. The electric field intensity in and around a transmission tower is lowered, and the greatest point of the magnetic field is shifted to the heavy load line but generally is given the trend that the peak value appear at the central part of the transmission tower. The magnitudes of the maximum electric and magnetic fields in the vicinity of a transmission tower are less than 3.5[kV/m] and $20[{\mu}T]$, respectively. The measured electric and magnetic fields are satisfied with limits and guidelines recommended by various authorized international institutes.

  • PDF

Design of Low Voltage 1.8V, Wide Range 50∼500MHz Delay Locked Loop for DDR SDRAM (DDR SDRAM을 위한 저전압 1.8V 광대역 50∼500MHz Delay Locked Loop의 설계)

  • Koo, In-Jae;Chung, Kang-Min
    • The KIPS Transactions:PartA
    • /
    • v.10A no.3
    • /
    • pp.247-254
    • /
    • 2003
  • This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

Algorithm for Fault Location Estimation on Transmission Lines using Second-order Difference of a Positive Sequence Current Phasor

  • Yeo, Sang-Min;Jang, Won-Hyeok;Kim, Chul-Hwan
    • Journal of Electrical Engineering and Technology
    • /
    • v.8 no.3
    • /
    • pp.499-506
    • /
    • 2013
  • The accurate estimation of a fault location is desired in distance protection schemes for transmission lines in order to selectively deactivate a faulted line. However, a typical method to estimate a fault location by calculating impedances with voltages and currents at relaying points may have errors due to various factors such as the mutual impedances of lines, fault impedances, or effects of parallel circuits. The proposed algorithm in this paper begins by extracting the fundamental phasor of the positive sequence currents from the three phase currents. The second-order difference of the phasor is then calculated based on the fundamental phasor of positive sequence currents. The traveling times of the waves generated by a fault are derived from the second-order difference of the phasor. Finally, the distance from the relaying point to the fault is estimated using the traveling times. To analyze the performance of the algorithm, a power system with EHV(Extra High Voltage) untransposed double-circuit transmission lines is modeled and simulated under various fault conditions, such as several fault types, fault locations, and fault inception angles. The results of the simulations show that the proposed algorithm has the capability to estimate the fault locations with high speed and accuracy.

Design of Small-Size High-Power SPDT PIN Diode Switch with Defected Ground Structure for Wireless Broadband Internet Application (결함접지구조(Defected Ground Structure)를 갖는 휴대 인터넷용 소형 고전력 SPDT PIN 다이오드 스위치 설계)

  • Kim Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.16 no.10 s.101
    • /
    • pp.1003-1009
    • /
    • 2005
  • In this paper, small-size high-power single pole double throw(SPDT) switch with defected pound structure(DGS) is presented for wireless broadband internet application. To reduce the circuit size using slow-wave characteristic, the DGS is applied to ${\lambda}/4$ transmission line of the switch and the measured results are compared with them of conventional switch. To secure high degree of isolation, the switch with the DGS is composed of shunt-connected PIN diodes and shows insertion loss of 0.8 dB and isolation more than 50 dB at 2.3 GHz. The size of the switch is reduced about $50\%$ only with the DGS patterns while it has very similar performance to the conventional shunt-type switch.

Design of Submarine Cable for Capacity Extension of Power Line (전력선 용량증대를 위한 해저케이블 설계)

  • Son, Hong-Chul;Moon, Chae-Joo;Kim, Dong-Sub
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.17 no.1
    • /
    • pp.77-84
    • /
    • 2022
  • A submarine power cable is a transmission cable for carrying electric power below the surface of the water. Recently, submarine cables transfer power from offshore renewable energy schemes to shore, e.g. wind, wave and tidal systems, and these cables are either buried in the seabed or lie on the ocean floor, depending on their location. Since these power cables are used in the extreme environments, they are made to withstand in harsh conditions and temperatures, and strong currents. However, undersea conditions are severe enough to cause all sorts of damage to offshore cables, these conditions result in cable faults that disrupt power transmission. In this paper, we explore the design criteria for such cables and the procedures and challenges of installation, and cable transfer splicing system. The specification of submarine cable designed with 3 circuits of 154kV which is composed of the existing single circuit and new double circuits, and power capacity of 100MVA per cable line. The determination of new submarine cable burial depth and cable arrangement method with both existing and new cables are studied. We have calculated the permission values of cable power capacity for underground route, the values show the over 100MW per cable line.

Design of Reconfigurable Resonator with Cross Polarized SRR (교차편파 SRR을 이용한 재구성 공진기 설계)

  • Kim, Jinyoung;Jung, Changwon
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.14 no.7
    • /
    • pp.3450-3453
    • /
    • 2013
  • We implemented double-negative metamaterials using cross-polarized split-ring resonators in a microstripline. The split-ring resonators comprised quad ring structures and were connected with the microstripline in series. Four different structures, with the shorted rings in varying locations, were fabricated to demonstrate reconfigurable band-pass characteristics. The effective permittivities and permeabilities were extracted using the Ziolkowski method. Excellent agreement between the developed circuit model and the measurement was observed up to 10 GHz.