• 제목/요약/키워드: Double-Circuit

검색결과 531건 처리시간 0.027초

삼차권선을 이용한 이중퀜치 자속구속형 초전도한류기의 전류제한 특성 분석 (Analysis on Current Limiting Characteristics of Double Quench Flux-Lock Type SFCL Using Its Third Winding)

  • 한태희;임성훈
    • 한국전기전자재료학회논문지
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    • 제29권5호
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    • pp.289-293
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    • 2016
  • The flux-lock type superconducting fault current limiter (SFCL) connects the two parallel windings in parallel with a ferromagnetic core. We suggest that the double quench flux-lock type SFCL should add a third winding. We analyzed characteristics of the fault current and the peak current using the quench of the high-Tc superconducting element. The proposed SFCL's inductances of a primary winding and the third winding were fixed and the amplitude of inductance of the secondary winding was changed. We found that the fault current can be more effectively controlled through the analysis of the equivalent circuit and the short-circuit tests.

765kV 교류 2회선 송전선 인근의 생체 및 물체 유도 전압, 전류 계산 (Calculation of the Induced Voltage and Current for a Human and an Object Close to 765kV AC Double Circuit Transmission Line)

  • 민석원;김응식;명성호;이병윤;박종근
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1994년도 하계학술대회 논문집 C
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    • pp.1509-1511
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    • 1994
  • This paper calculates the induced voltage and current for a human and a car under 765 kV AC double circuit transmission line. A human and a car is simulated as two dimension by the use of charge simulation method and as three dimension by using surface charge method. The phase arrangement of transmission line is varied to calculate the induced voltage and current. In two cases a human and a car is grounded or floated, the induced voltage and current is also compared.

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$320{\times}256$ 초점면배열 적외선 검출기를 위한 고성능 저 전력 신호취득회로의 제작 (Fabrication of High Performance and Low Power Readout Integrated Circuit for $320{\times}256$ IRFPA)

  • 김치연
    • 한국군사과학기술학회지
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    • 제10권2호
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    • pp.152-159
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    • 2007
  • This paper describes the design, fabrication, and measurement of ROIC(ReadOut Integrated Circuit) for $320{\times}256$ IRFPA(InfraRed Focal Plane Array). A ROIC plays an important role that transfer photocurrent generated in a detector device to thermal image system. Recently, the high performance and low power ROIC adding various functions is being required. According to this requirement, the design of ROIC focuses on 7MHz or more pixel rate, low power dissipation, anti-blooming, multi-channel output mode, image reversal, various windowing, and frame CDS(Correlated Double Sampling). The designed ROIC was fabricated using $0.6{\mu}m$ double-poly triple-metal Si CMOS process. ROIC function factors work normally, and the power dissipation of ROIC is 33mW and 90.5mW at 7.5MHz pixel rate in the 1-channel and 4-channel operation, respectively.

765kV 2회선 송전선의 코로나 방전에 의한 환경영향 연구 (Environmental effects by corona discharge from a 765kV double circuit transmission line)

  • 김정부;이동일;신구용;양광호;안희성;구자윤
    • 대한전기학회논문지
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    • 제45권3호
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    • pp.451-455
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    • 1996
  • This paper specified the measurement results conducted by the Korea Electric Power Research Institute (KEPRI) 765kV double circuit transmission test line that measured the audible noise, hum noise, radio interference, electric field and aeolian measurement. This test line consists of 6-480mm$^{2}$ conductors per phase. The analysis of the test results shows that this 6-Rail conductor bundle satisfies the audible noise criterion under the stable rainy weather condition and the radio interference level under the fair weather. And the other items are also agreed with the design level criterion. (author). 9 refs., 7 figs., 2 tabs.

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765 kV 2회선 송전선 활선 작업자 인체내부 유도전류 밀도 해석 (Analysis on Current Density Induced Inside Body of Hot-Line Worker for 765kV Double Circuit Transmission Line)

  • 송기현;민석원
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제55권5호
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    • pp.231-238
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    • 2006
  • This paper analysed the induced current density inside human body of hot-line worker for 765kV double circuit transmission line according to locations of human body. Human model was composed of several organs and other parts, whose shapes were expressed by spheroids or cylinders. Organs such as the brain, heart, lungs, liver and intestines were taken into account. Applying the 3 dimensional boundary element method, we calculated induced current density in case a worker was located inside and outside a lowest phase of 765 kV transmission line in which a 60% current of maximum load flowed. As results of study, we found a maximum induced current density in all organs was less than $10mA/m^2$ when a wonder was outside. As one in brain and heart was higher than $10mA/m^2$ when a worker was inside, we propose a method for lowering current density.

Fabrication and Characteristics of an InP Single HBT and Waveguide PD on Double Stacked Layers for an OEMMIC

  • Kim, Hong-Seung;Kim, Hye-Jin;Hong, Sun-Eui;Jung, Dong-Yun;Nam, Eun-Soo
    • ETRI Journal
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    • 제26권1호
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    • pp.61-64
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    • 2004
  • We have explored the fabrication of an InP/InGaAs single heterojunction bipolar transistor (HBT) and a wave guide p-i-n photodiode (PD) on two kinds of double stacked layers for the implementation of an optoelectronic millimeter-wave monolithic integrated circuit (OEMMIC). We applied a photosensitive polyimide for passivation and integration to overcome the large difference between the HBT and PD layers of around $3{\mu}m$. Our experiment showed that the RF characteristics of the HBT were dependent on the location of the PD layer, while the dc performances of the HBTs and PDs were independent of the type of stacked layer used. The $F_t$ and $F_{max}$ of the HBTs on the HBT/PD stacked layer were 10% lower than those of the HBTs on the PD/HBT stacked layer.

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저전압용 CMOS 연산 증폭기를 위한 전력 최소화 기법 및 그 응용 (A power-reduction technique and its application for a low-voltage CMOS operational amplifier)

  • 장동영;이용미;이승훈
    • 전자공학회논문지C
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    • 제34C권6호
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    • pp.37-43
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    • 1997
  • In this paper, an analog-domain powr-reduction technique for a low-voltage CMOS operational amplifier and its application to clock-based VLSI systems are proposed. The proposed technique cuts off the bias current of the op amp during a half cycle of the clock in the sleeping mode and resumes the curent supply sequentially during the remaining cycle of the clock in the normal operating mode. The proposed sequential sbiasing technique reduces about 50% of the op amp power and improves the circuit performance through high phase margin and stable settling behavior of the output voltage. The power-reduction technique is applied to a sample-and-hold amplifier which is one of the critical circuit blocks used in the front-end stage of analog and/or digital integrated systems. The SHA was simulated and analyzed in a 0.8.mu.m n-well double-poly double-metal CMOS technology.

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전류환류형 DC-DC콘버터를 이용한 이중출력 회로 (The Double-Output DC-DC Converter Using the Current-Fed Converter)

  • 이윤종;김희준;안태영
    • 대한전기학회논문지
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    • 제38권6호
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    • pp.451-457
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    • 1989
  • The current-fed DC-DC converter, which is known as the most stable DC-DC converter, has a two-winding reactor in series with the input. In this paper a new double-output DC-DC converter circuit, in which the 2nd winding of the reactor is creating the 2nd output, while the 2nd winding is feeding the energy to the input in the current-fed converter, is propose. The steady state characteristics of the new circuit are clarified and it is found that the maximum value exists in the 2nd output. Furthermore, regulation characteristic is analysed by 'Slope method' and the result shows good agreement with experimental value. The 2nd output voltage regulation is performed by using regulation IC. As a result, we have achieved good regulation characteristics.

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양면 LCC 보상 회로를 가진 무선 전력 충전기용 공진 컨버터의 설계 (Design of the Resonant Converter with a Double Sided LCC Compensation Circuit for Wireless Charger.)

  • 부반빈;트란덕홍;최우진
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2015년도 전력전자학술대회 논문집
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    • pp.321-322
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    • 2015
  • The aim of this paper is to propose a design method for the double-sided LCC compensation circuit for 6.6kW electric vehicle (EVs) wireless charger. The analysis and comparison with several compensation topologies such as SS, SP, PS, PP and the hybrid LCC compensation is presented. It has been found that the hybrid LCC compensation has superior performance in comparison with other topologies. The design procedure for the EV charger is presented and the PSIM simulation results are provided.

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자율 학습 신경회로망을 이용한 고장상 선은 알고리즘 (The Discrimination of Fault Type by Unsupervised Neural Network)

  • 이재욱;최창열;장병태;이명회;노장현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 하계학술대회 논문집 A
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    • pp.384-387
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    • 2004
  • The direction and the type of a fault on a transmission line need to be identified rapidly and correctly, The work described in this paper addresses the problem encountered by a conventional algorithm in a fault type classification in double circuit line, this arises due to a mutual coupling and CT saturation under the fault condition. We present an approach to identify fault type with novel neural network on double circuit transmission line. The neural network based on combined unsupervised training method provides the ability classify the fault type by different patterns of the associated voltages and currents.

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