• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.11 s.114
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• pp.1030-1039
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• 2006

A high power and high gain Doherty amplifier is designed by using embedded driver amplifiers in the final stage. The operational characteristics of a two-stage Doherty amplifier are analyzed, as a function of the two-stage peaking amplifier gate biases. The driver stages and final output stages are implemented using two single-ended MRF21045s and a single push-pull packaged MRF5P21180, respectively. This two-stage Doherty amplifier demonstrated 27 dB gain with a PAE of 23 % at 15 W average output power.

• Journal of Advanced Navigation Technology
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• v.18 no.3
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• pp.229-235
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• 2014

This paper presents the Doherty power amplifier with a digitally controlled analog predistorter circuit of Scintera Corp. to produce high power efficiency and high linearity performance. The analog predistorter improves the linearity performance because of controlling amplitude and phase values of input signal in order to improve intermodulation performance of power amplifier. Also, the power amplifier is designed by the Doherty technology to obtain the high efficiency performance. To validate the Scintera's analog predistorter, we are implemented the power amplifier with Doherty method at center frequency 2150 MHz. Compared with the balanced amplifier, the power amplifier is improved above 11% enhanced efficiency and more than 15 dB ACPR improvement.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.89-90
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• 2007

In this paper, we propose Doherty amplifier with proper drain bias line. By $\lambda$/4 microstrip line, IMD is eliminated. Also output power of amplifier is reduced in wanted bandwidth. For linearity improvement, we design drain bias with narrow $\lambda$/4 microstrip line. We observe that gain characteristics improve 1dB and $3^{rd}/5^{th}$ IMD characteristics reduce 5dB/10dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.11
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• pp.1934-1939
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• 2006

Current digital communication system is selecting very various digital Modulation way. Need linear power amplifier necessarily to reduce interference for contiguity channel maximum in this communication system and at the same time, power amplifier of high efficiency is required. In this paper Compare with result of equilibrium power amplifier that design Doherty power amplifier of way that linearity and efficiency are improved at the same time through simulation optimization techniques and at the same time design through simulation, efficiency 20% linearity showed 10dB that is improved.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.8
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• pp.807-813
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• 2008

The gate-biases of the Doherty power amplifier are controlled to improve the linearity performance. The linearity improvement mechanism of the Doherty amplifier is the harmonic cancellation of the carrier and peaking amplifier at the output power combining point. However, it is difficult to cancel the harmonic power for the broader power range because the condition for cancelling is varied by power. For the linearity improvement, we have explored the linearity characteristic of the Doherty amplifier according to the input power and gate biases of the carrier and peaking amplifier. To extend the region of harmonic power cancellation, we have injected the proper gate bias to the carrier and peaking amplifier according to the input power levels. To validate the linearity improvement, the Doherty amplifier is designed using Eudyna 10-W PEP GaN HEMT EGN010MKs at 2.345 GHz and optimized to achieve a high linearity and efficiency at an average output power of 33 dBm, backed off about 10 dB from the $P_{1dB}$. In the experiments, the envelope tracking Doherty amplifier delivers a significantly improved adjacent channel leakage ratio performance of -37.4 dBc, which is an enhancement of about 2.8 dB, maintaining the high PAE of about 26 % for the WCDMA 1-FA signal at an average output power of 33 dBm. For the 802.16-2004 signal, the amplifier is also improved by about 2 dB, -35 dB.

• Journal of Advanced Navigation Technology
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• v.12 no.3
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• pp.220-226
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• 2008

This paper proposes the Reconfigurable Doherty Amplifier(RDA) with asymmetric structure which has ${\lambda}/4$ impedance transformer for modulating the load impedance in peaking amplifier path. This structure is possible to implement a compact size for N-stage multi Doherty amplifier and to get almost same characteristics that is compared to conventional Doherty amplifier. To realize the high efficiency amplifier, we were implemented 45 Watts power amplifier at transmitter band of Wideband Code Division Multiple Access(WCDMA) base-station. As a result, in case of WCDMA 1 Frequency Allocation(FA) input signals, this amplifier has obtained a 26.3% Power Added Efficiency(PAE) at 8 dB back-off point from P1dB and an Adjacent Channel Leakage Power(ACLR) is -40.4 dBc at center frequency ${\pm}5MHz$ deviation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.11 s.102
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• pp.1059-1066
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• 2005

This paper reports an application of Doherty amplifier for efficiency improvement of feedforward power amplifier(FPA). For performance analysis, we measured 15 W average output power using WCDMA 4FA input signal with a center frequency 2.14 GHz. The applied Doherty amplifier presents the characteristics of high efficiency and low linearity in comparison to the class AB amplifier, and it was used as main amplifier of FPA fir efficiency improvement. To analyze the change of characteristic, tow Doherty amplifiers whose linearity and efficiency are different were applied. The applied FPAs are improved about $2\%$ or more performance in efficiency, but decreased in linearity on 15 W average output power. We additionally modified the coupling factor(CF) of the error loop and the error amplifier capacity for linearity improvement. Aa a result, the efficiency improvement and high linearity resulted from the change of CF and error amplifier capacity. However, we think if the linearity of Doherty amplifier were more than 35 dBc, the FPA would improve the performance about $2\%$ or more efficiency and maintain enough linearity.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.2 s.314
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• pp.32-38
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• 2007

This paper represents a Doherty amplifier (DPA) with analog predistorter (PD) to improve the linearity of the DPA while preserving the high efficiency. A third-order PD cancels fifth-order intermodulation (IM5) as well as third-order intermodulation (IM3) components by their same phase difference in the PD and DPA. This is accomplished by independently controlling their phase by using the phase-controlled error generator in the PD. Also, we confirm the phase-control ability of the error generator experimentally with a simple and accurate phase measurement setup. For experimental verification, a third-order PD has been implemented and tested in a 180-W DPA at the wide-band code division multiple access (WCDMA) band of 2.11-2.17 GHz. Two-tone test results show that significant cancellation of IM3 and IM5 components can be obtained. For four-carrier WCDMA applications, significant adjacent channel leakage ratio (ACLR) improvement is achieved over a wide range of output power levels. This technique is cost-effective and convenient due to its simple structure, compact size, and three control parameters.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.19-22
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• 2004

This paper implemented 2.14GHz band Adaptive Hybrid Doherty (AHD) amplifier, as well as, wished to improve the high power characteristics and efficiency by composing bias adjustment circuit with LDMOS. Finally, through CAE, confirmed that AHD amplifier have superior performance than hybrid balanced amplifier. Superior characteristics of AHD amplifier is expected to affect immensely in amplifier field hereafter.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.8 no.1
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• pp.12-17
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• 2009

In this paper, We play it for the purpose of study about the power amplifier which applied DGS and adaptive bias circuit structure to general Doherty amplifier for the efficiency of a RF power amplifier and a linearity improvement in the WiBro band. As for the IMD3, 3.4dBc was improved with -26.3dBc when we did the measurement result existing Doherty power amplifier and comparison of the Doherty power amplifier which applied an adaptive bias circuit and the DGS which proposed in this paper, and the mean power efficiency verified what was increased in 37%. Also, we were able to know PAE of 36.6% with output power 34.0dBm in P1dB when magnitude of an input signal was 25.6dBm. we did 6dB back off in output P1dB in order to confirm the ACPR which was a nonlinear characteristic and measured the ACPR. we showed the -34.55dBc which was a value of -34.5dBc or below in the 4.77MHz off-set that was a transmission standard. Therefore, we were able to know that we were satisfied with a spectrum mask standard.