• Management & Information Systems Review
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• v.14
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• pp.151-180
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• 2004

Owing to the digital revolution, Internet Commerce and Electronic commerce, revolutionize the way of doing business and making payment. The entrance of the Internet has a prominent for spread of Electronic Commerce and those phenomenons will result in paperless trading and cashless trade. By virtue of Internet, an increasing share of business transactions occurs online. Electronic payment is essential for the smooth progress of the electronic commerce as electronic payment plays the important role in the electronic commerce, that is, the value transfer restyling from the electronic commerce. Traditionally international settlement systems such as letters of credits, remittance and documentary collections operated as important and poplar method of payment, Now, information technology has made it possible to pay for the sale of goods and services over the internet. In international trade, there are service providers (bolero, TradeCard, BeXcom) to settle payment electronically through the Internet. The purpose of this study is to Conduct comparative analysis with approach manner functional respect systematic respect, role. It is shown which the Electronic payment system is better. In this study, the author attempts to find the problems is (bolero, TradeCard, BeXcom) and solutions in switching from the documentary payment system to the electronic one. This conclusion of this study can be summarized as followings. In resoect of the law, bolero should seek to prevert the users from being treated unfairly due to multilateral agreement on Rulebook. TradeCard, BeXcom do not have the proper law that users are governed. so far as the practice problems concerned, stability of computer's operation and security of message interchange should be warranted and improved continuously. Through the standardization of the electronic document and the development of software, the examination of the shipping occuments must be done automatically. Bolero should induce more banks to take part in Bolero, and make the carrier the cost and time in managing the traditional document which will be used for the time being. In respect of information technology and security, to deduce the risk in the electronic settlement system and positively uses the global authentication guideline(Identrus).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.1
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• pp.9-15
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• 2015

A CMOS band-pass delta-sigma modulator(BPDSM) and cascode class-E power amplifier have been developed CMOS for Class-S power amplifier applications. The BPDSM is operating at 1-GHz sampling frequency, which converts a 250-MHz sinusoidal signal to a pulse-width modulated digital signal without the quantization noise. The BPDSM shows a 25-dB SQNR(Signal to Quantization Noise Ratio) and consumes a power of 24 mW at an 1.2-V supply voltage. The class-E power amplifier exhibits an 18.1 dBm of the maximum output power with a 25% drain efficiency at a 3.3-V supply voltage. The BPDSM and class-E PA were fabricated in the Dongbu's 110-nm CMOS process.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.10
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• pp.926-934
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• 2016

In this paper, we designed a compact frequency synthesizer with multi-function for Ka-band seeker. DDS(Direct Digital Synthesizer) is applied to generate various waveform and to cover high-speed frequency sweep. In order to reduce size, waveform generator and frequency up-converter are integrated in one module. Proposed frequency synthesizer provides precise detection and tracking waveform for low and high speed targets. It is observed that fabricated synthesizer performs $0.45{\mu}sec$ frequency switching time and -93.69 dBc/Hz phase noise at offset 1 kHz. The size of the synthesizer is kept within 120 mm width, 120 mm length and 22 mm height.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.15 no.1
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• pp.90-97
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• 2001

A high frequency resonant inverter consisting of iliree unit Half-Bridge serial resommt inverter used as power source of induction heatmg at high frequency is presented in this paper. As a output [Dwer control strategy, sequencial time-sharing gate contml methcd is applied. This methcd is TDM(Time Division Multiplexing), which is broadly used with digital and analog signals transmission in communication system 1be analysis of the proposed circuit is generally described by using the normalized pararmenters. Also, the principle of basic operating and the its characteristics are estimated by the parameters such as switching frequency, load resistance. Also, according to the calculated characteristics value, a method of the circuit design and operating characteristics of the inverter is proposed. This paper proves the validity of theoretical analysis through the Pspice. This proposed inverter show that it can be practically used in future as power source system for induction heating application, DC-DC converter etc. r etc.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.1
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• pp.72-81
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• 2009

This paper presents quasi-resonant type high power factor ac power supply for atmospheric pressure plasma cleaning system adopting three phase PFC boost converter and it's control method. The presented ac power supply consists of single phase H-bridge inverter, step-up transformer for generating high voltage and three phase PFC boost converter for high power factor on source utility. Unlikely to the traditional LC resonant converter, the propose one has an inductor inside only. A single resonant takes place through the inside inductor and the capacitor from the plasma load modeled into two series capacitor and one resistance. The quasi-resonant can be achieved by cutting the switching signal when the load current decrease to zero. To obtain power control ability, the propose converter controlled by two control schemes. One is the changing output pulse period scheme in the manner of PFM(Pulse Frequency Modulation) control. On the other, to provide more higher power to load, the DC rail voltage is directly controlled by the 3-phase PFC boost converter. The significant merits of the proposed converter are the uniform power providing capability for high quality plasma generation and low reactive power in AC and DC side. The proposed work is verified through digital simulation and experimental implementation.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.38-39
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• 2007

Recently, utility network is becoming more and more complicated and huge due to IT(Information Technology) and OA(Office Automation) devices. In addition to, demands of power conversion devices which have non-linear switching devices are getting more and more increased. Voltage sag from sudden increasing loads is also one of the major problems inside of the utility network. In order to compensate the voltage sag problem, power compensation devices systems could be a good solution method. In case of voltage sag, it needs an energy source to overcome the energy caused by voltage sag. Superconducting Magnet Energy Storage (SMES) is a very good promising source due to the high response time of charge and discharge. This paper presents a real-time simulation algorithm for the SMES by using Real Time Digital Simulator (RTDS). With this algorithm users can easily do the simulation of utility power network applied by SMES system with the SMES coil modeled in RTDS.

• Nuclear Engineering and Technology
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• v.53 no.10
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• pp.3327-3334
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• 2021

Present electric grids are advanced to integrate smart grids, distributed resources, high-speed sensing and control, and other advanced metering technologies. Cybersecurity is one of the challenges of the smart grid and nuclear plant digital system. It affects the advanced metering infrastructure (AMI), for grid data communication and controls the information in real-time. The research article is emphasized solving the nuclear and smart grid hardware security issues with the integration of field programmable gate array (FPGA), and implementing the latest Time Authenticated Cryptographic Identity Transmission (TACIT) cryptographic algorithm in the chip. The cryptographic-based encryption and decryption approach can be used for a smart grid distribution system embedding with FPGA hardware. The chip design is carried in Xilinx ISE 14.7 and synthesized on Virtex-5 FPGA hardware. The state of the art of work is that the algorithm is implemented on FPGA hardware that provides the scalable design with different key sizes, and its integration enhances the grid hardware security and switching. It has been reported by similar state-of-the-art approaches, that the algorithm was limited in software, not implemented in a hardware chip. The main finding of the research work is that the design predicts the utilization of hardware parameters such as slices, LUTs, flip-flops, memory, input/output blocks, and timing information for Virtex-5 FPGA synthesis before the chip fabrication. The information is extracted for 8-bit to 128-bit key and grid data with initial parameters. TACIT security chip supports 400 MHz frequency for 128-bit key. The research work is an effort to provide the solution for the industries working towards embedded hardware security for the smart grid, power plants, and nuclear applications.

• Journal of the Korean Society of Industry Convergence
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• v.21 no.6
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• pp.265-271
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• 2018

DC-DC buck converter is a critical building block in the power management integrated circuit (PMIC) architecture for the portable devices such as cellular phone, personal digital assistance (PDA) because of its power efficiency over a wide range of conversion ratio. To ensure a safe operation, avoid unexpected damages and enhance the reliability of the converter, fully-integrated protection circuits such as over voltage protection (OVP), under voltage lock out (UVLO), startup, and thermal shutdown (TSD) blocks are designed. In this paper, these three fully-integrated protection circuit blocks are proposed for use in the DC-DC buck converter. The buck converter with proposed protection blocks is operated with a switching frequency of 1 MHz in continuous conduction mode (CCM). In order to verify the proposed scheme, the buck converter has been designed using a 180 nm CMOS technology. The UVLO circuit is designed to track the input voltage and turns on/off the buck converter when the input voltage is higher/lower than 2.6 V, respectively. The OVP circuit blocks the buck converter's operation when the input voltage is over 3.3 V, thereby preventing the destruction of the devices inside the controller IC. The TSD circuit shuts down the converter's operation when the temperature is over $85^{\circ}C$. In order to verify the proposed scheme, these protection circuits were firstly verified through the simulation in SPICE. The proposed protection circuits were then fabricated and the measured results showed a good matching with the simulation results.

• Advances in nano research
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• v.10 no.5
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• pp.415-422
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• 2021

Silicene, a 2D allotrope of silicon, is predicted to be a potential material for future transistor that might be compatible with present silicon fabrication technology. Similar to graphene, silicene exhibits the honeycomb lattice structure. Consequently, silicene is a semimetallic material, preventing its application as a field-effect transistor. Therefore, this work proposes the uniform doping bandgap engineering technique to obtain the n-type silicene nanosheet. By applying nearest neighbour tight-binding approach and parabolic band assumption, the analytical modelling equations for band structure, density of states, electrons and holes concentrations, intrinsic electrons velocity, and ideal ballistic current transport characteristics are computed. All simulations are done by using MATLAB. The results show that a bandgap of 0.66 eV has been induced in uniformly doped silicene with phosphorus (PSi₃NW) in the zigzag direction. Moreover, the relationships between intrinsic velocity to different temperatures and carrier concentration are further studied in this paper. The results show that the ballistic carrier velocity of PSi₃NW is independent on temperature within the degenerate regime. In addition, an ideal room temperature subthreshold swing of 60 mV/dec is extracted from ballistic current-voltage transfer characteristics. In conclusion, the PSi₃NW is a potential nanomaterial for future electronics applications, particularly in the digital switching applications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.6
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• pp.722-728
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• 2020

Digital image processing has been applied in a wide range of fields due to the development of IoT technology and plays an important role in data processing. Various techniques have been proposed to remove such noise, but the conventional impulse noise canceling methods are insufficient to remove noise of edge components of an image, and have a disadvantage of being greatly affected by random impulse noise. Therefore, in this paper, we propose an algorithm that effectively removes edge component noise in random impulse noise environment. The proposed algorithm calculates the threshold value by determining the noise level and switches the filtering process by comparing the reference value with the input pixel value. The proposed algorithm shows good performance in the existing method, and the simulation results show that the noise is effectively removed from the edge of the image.