• Title/Summary/Keyword: Digital engineering

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Attitude Control of Artificial Satellites via Intelligent Digital Redesign

  • Lee, Ho-Jae;Park, Jin-Bae;Lee, Yeun-Woo;Joo, Young-Hoon
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1283-1288
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    • 2003
  • This paper proposes an approach to attitude control artificial satellites with jet-engine. The jet-engine produces on-off thrust, which can be modelled as pulse-width-modulated (PWM) function. Therefore, the problem is converted to design a PWM controller and we develop an efficient technique for this purpose using digital redesign. The digital redesign is a converting technique a well-designed analog controller into the equivalent digital one maintaining the property of the original analog control system in the sense of state-matching. The redesigned digital controller is again converted into PWM controller using the equivalent area principle. We show a computer simulation of the attitude control of artificial satellites.

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Measurement Resolution of Edge Position in Digital Optical Imaging

  • Lee, Sang-Yoon;Kim, Seung-Woo
    • International Journal of Precision Engineering and Manufacturing
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    • v.1 no.1
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    • pp.49-55
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    • 2000
  • The semiconductor industry relies on digital optical imaging for the overlay metrology of integrated circuit patterns. One critical performance demand in the particular application of digital imaging is placed on the edge resolution that is defined as the smallest detectable displacement of an edge from its image acquired in digital from. As the critical feature size of integrated circuit patterns reaches below 0.35 micrometers, the edge resolution is required to be less than 0.01 micrometers. This requirement is so stringent that fundamental behaviors of digital optical imaging need to be explored especially for the precision coordinate metrology. Our investigation reveals that the edge resolution shows quasi-random characteristics, not being simply deduced from relevant opto-electronic system parameters. Hence, a stochastic upper bound analysis is made to come up with the worst edge resolution that can statistically well predict actual indeterminate edge resolutions obtained with high magnification microscope objectives.

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Micro-Structure Measurement and Imaging Based on Digital Holography

  • Kim, Kyeong-Suk;Jung, Hyun-Chul;Chang, Ho-Seob;Kee, Chang-Doo;Akhter, Naseem
    • Journal of the Korean Society for Nondestructive Testing
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    • v.30 no.3
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    • pp.257-260
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    • 2010
  • Advancements in the imaging and computing technology have opened the path to digital holography for non-destructive investigations of technical samples, material property measurement, vibration analysis, flow visualization and stress analysis in aerospace industry which has widened the application of digital holography in the above fields. In this paper, we demonstrate the non-destructive investigation and micro-structure measurement application of digital holography to the small particles and a biological sample. This paper gives a brief description of the digital holograms recorded with this system and illustratively demonstrated.

Analysis of Digital Hologram Rendering Using a Computational Method

  • Choi, Hyun-Jun;Seo, Young-Ho;Jang, Seok-Woo;Kim, Dong-Wook
    • Journal of information and communication convergence engineering
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    • v.10 no.2
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    • pp.205-209
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    • 2012
  • To manufacture a real time digital holographic display system capable of being applied to next-generation television, it is important to rapidly generate a digital hologram. In this paper, we analyze digital hologram rendering based on a computer computation scheme. We analyze previous recursive methods to identify regularity between the depth-map image and the digital hologram.

A Phase-Locked Loop with Embedded Analog-to-Digital Converter for Digital Control

  • Cha, Soo-Ho;Jeong, Chun-Seok;Yoo, Chang-Sik
    • ETRI Journal
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    • v.29 no.4
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    • pp.463-469
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    • 2007
  • A phase-locked loop (PLL) is described which is operable from 0.4 GHz to 1.2 GHz. The PLL has basically the same architecture as the conventional analog PLL except the locking information is stored as digital code. An analog-to-digital converter is embedded in the PLL, converting the analog loop filter output to digital code. Because the locking information is stored as digital code, the PLL can be turned off during power-down mode while avoiding long wake-up time. The PLL implemented in a 0.18 ${\mu}m$ CMOS process occupies 0.35 $mm^2$ active area. From a 1.8 V supply, it consumes 59 mW and 984 ${\mu}W$ during the normal and power-down modes, respectively. The measured rms jitter of the output clock is 16.8 ps at 1.2 GHz.

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Digital Watermarking by Rearranging and Modifying DCT Coefficients

  • Lee, Hee sup;Oh, Sang-Heun;Lee, Keun-Young
    • Proceedings of the IEEK Conference
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    • 2000.07b
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    • pp.902-905
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    • 2000
  • Because of the rapid growth of Internet and multimedia applications, how to protect IPR (intellectual property rights) has become a critical issue. Is one of the ways to overcome the problem of the protection of IPR. Digital watermarking call be applied to multimedia data, such as digital images, digital video, and digital audio. In this paper, we propose a digital watermarking technique for digital images to authenticate an owner or an image by embedding visually recognizable patterns, such as logos, signatures, or stamps into images In BDCT (block discrete cosine transform) frequency domain. The proposed method sorts the components of an original image twice. At the same time, the method, also, rearranges the components of a watermark twice in order to be more robust, and finally embeds the watermark into the image. From the experimental results, the conjunction of three similarity measurements shows that our proposed method is robust to image cropping, image filtering, and JPEG (the Joint Photographic Experts Group) both subjectively and objectively.

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Elemental Image Synthesis for Integral Imaging Using Phase-shifting Digital Holography

  • Jeong, Min-Ok;Kim, Nam;Park, Jae-Hyeung
    • Journal of the Optical Society of Korea
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    • v.12 no.4
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    • pp.275-280
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    • 2008
  • We propose a method generating elemental images for the integral imaging using 4-step phaseshifting digital holography. Phase shifting digital holography is a way recording the digital hologram by changing the phase of the reference beam and extracting the complex field of the object beam. Since all 3D information is captured by phase-shifting digital holography, the elemental images for any specifications of the lens array can be generated from single phase-shifting digital holography. In experiment, phase-shifting is achieved by rotating half- and quarter- wave plates and the resultant interference patterns are captured by a $3272{\times}2469$ pixel CCD camera with $27{\mu}m{\times}27{\mu}m$ pixel size.

Design and Implementation of a Digital Evidence Management Model Based on Hyperledger Fabric

  • Jeong, Junho;Kim, Donghyo;Lee, Byungdo;Son, Yunsik
    • Journal of Information Processing Systems
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    • v.16 no.4
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    • pp.760-773
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    • 2020
  • When a crime occurs, the information necessary for solving the case, and various pieces of the evidence needed to prove the crime are collected from the crime scene. The tangible residues collected through scientific methods at the crime scene become evidence at trial and a clue to prove the facts directly against the offense of the suspect. Therefore, the scientific investigation and forensic handling for securing objective forensic in crime investigation is increasingly important. Today, digital systems, such as smartphones, CCTVs, black boxes, etc. are increasingly used as criminal information investigation clues, and digital forensic is becoming a decisive factor in investigation and trial. However, the systems have the risk that digital forensic may be damaged or manipulated by malicious insiders in the existing centralized management systems based on client/server structure. In this paper, we design and implement a blockchain based digital forensic management model using Hyperledger Fabric and Docker to guarantee the reliability and integrity of digital forensic. The proposed digital evidence management model allows only authorized participants in a distributed environment without a central management agency access the network to share and manage potential crime data. Therefore, it could be relatively safe from malicious internal attackers compared to the existing client/server model.

Simulation Modeling Methodology and Simulation Framework for a Construction of a Digital Shipyard (디지털 조선소 구축 및 활용을 위한 모델링 및 시뮬레이션 프레임워크 구축 방법론)

  • Woo, Jong-Hun;Oh, Dae-Kyun;Kwon, Young-Dae;Shin, Jong-Eye;Sur, Joo-No
    • Journal of the Society of Naval Architects of Korea
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    • v.42 no.4 s.142
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    • pp.411-420
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    • 2005
  • World leading company and research centers have invested much cost and effort into a PLM and digital manufacturing field to obtain their own competitiveness. We have been trying to apply a digital manufacturing, especially simulation to ship production process as a part of PLM implementation for a shipyard. A shipbuilding production system and processes have a complexity and a peculiarity different from other kinds of production systems. So, new analysis and modeling methodology is required to implement digital shipyard. which is a digital manufacturing system for a shipbuilding company. This paper suggests an analysis and simulation modeling methodologies for an implementation of a digital shipyard. New methodologies such as a database-merged simulation, a distributed simulation, a modular simulation with a model library and a 3-tire simulation framework are developed.

A High Tunable Capacitor Embedding Its Electrodes in Tunable Thin Film Dielectrics (가변형 박막 유전체에 전극을 임베디드 시킨 고가 변형 커패시터)

  • Lee Young-Chul;Hong Young-Pyo;Ko Kyung-Hyun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.9 s.112
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    • pp.860-865
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    • 2006
  • In this paper, a novel tunable inter-digital capacitor using dielectric tunable $Bi_2O_3-ZnO-Nb_2O_5(BZN)$ pyrochlore thin films is proposed. In order to improve the tunability and reduce DC bias voltage using the fringing electric field, the electrodes of the inter-digital capacitor are embedded in the thin film. Designed results using a 2.5 D simulator show that the tunability of the proposed inter-digital capacitor improves by 10 %, compared to the conventional inter-digital capacitor. The proposed IDC, which is based on the simulation results, was fabricated, using the BZN thin film deposited by a reactive RF magnetron sputtering on the on the silicon substrate. The fabricated inter-digital capacitor shows the maximum tunability of 50 % at 5.8 GHz and 18 V DC applied.