• 디지털융복합연구
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• 제14권2호
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• pp.351-357
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• 2016

전 세계 5,000만이 넘는 태권도인을 보유하고 있는 한국의 대표적인 전통무예이자 스포츠인 태권도를 테마로 한 문화관광상품은 그 시장성과 활용가치가 높다. 이에 연구자는 태권도원 방문관광객들이 태권도원 일원의 관광활동에 참여할 것의 전제하에 태권도 컨셉에 맞는 문화상품 생산을 결정하고 공예상품의 대중화, 소비자 지향주의 상품개발, 생산성 품질의 질적 성장으로 인한 문화상품에 대한 새로운 인식의 전환을 기대하는 디자인 개발을 실시 하고자 한다. 첫째, 태권도 정신과 스토리를 담은 스토리북, 둘째, 연필이나 양초 등을 꽂는 다용도 꽂이, 셋째, 실용적이고 세련된 대중적 가격대의 미니 메모지이다. 태권도 문화관광상품의 필요성과 활용 가능성을 재인식하고 개발된 상품은 무주 태권도원의 관광상품과 태권도 홍보에 적극 활용함으로써 기존의 문화관광상품들과는 차별화되는 상품으로써의 가치를 창출하는데 도움이 되기를 바란다.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• 한국실내디자인학회논문집
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• 제40호
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• pp.60-67
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• 2003

The perceptual change and reproduction process of a space is distinguished from the difference between the Modem Times and the digitalized Post-modem Times. According to this changing aspect, the dwelling. concept is also progressed toward the escapeness from the regularly standardized settlement. But, as written above, the escapable dwelling behavior pattern is re-territorizated through new restriction and domination system. Among the newly re-territorized dwelling areas, the virtual space that included human being's equal in the contemporary meaning has already been on the surface in our daily life, it has been enlarging into all kinds of activity. The virtual space has the possibility to extend beyond a already well-used to physical space and time unlimitedly. But, owing to the ambiguous boundary between the real space and the virtual space, it is getting more important to define the spatial substance in the Digital Age. From now on, especially, the academical fields like a Architecture and a Interior Design that dealed with a living space have to give it a great shot. What I really want to say is that various approach about the space itself with the help of many sorts of so-called a Case Study could be a diversity & uniqueness out of a typical point of view about the study handling on space and time.

• 한국구조물진단유지관리공학회 논문집
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• 제23권6호
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• pp.61-69
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• 2019

본 연구에서는 단일강섬유와 하이브리드강섬유로 보강된 UHPC의 휨강도 및 연성을 평가하기 위해 세 개의 휨파괴형 보에 대한 4점 가력 실험을 수행하였다. 실험 결과 단일섬유로 보강된 UHPC보다 하이브리드 섬유로 보강된 UHPC가 강도 및 연성 모든 측면에서 더 우수한 구조성능을 보유한 것으로 나타났다. 설계시의 안전성에 대해 평가하기 위하여, K-UHPC 구조설계지침에서 제공하는 방법에 따라 실험체의 강도와 연성을 평가해본 결과 현재의 재료모델은 강도에 대해서는 보수적으로 평가할 수 있으나 연성에 대해서는 과대평가하는 것으로 나타났다.

• KIEAE Journal
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• 제14권4호
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• pp.27-33
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• 2014

This study analyzed the electric vehicle recharging station status with recharging time limitation due to long waiting time, and figured out the user status by user interviews. And then this study verified the validity of hypothesis in terms of environmental design perspective and suggested layout of recharging station model. 21 recharging stations in Korea and station operation cases of 7 countries were examined. Except for the USA, the reality of electric vehicle recharging station today is the 1st proving stage focusing on the infrastructure construction of electric vehicle recharging station. It focuses on performance of recharging facility, use efficiency and operation environment of electric vehicle. About the effective waiting time of the user to use it should be studied. The current conditions of recharging station are as follows: Lack of independent recharging space, lack of facility that reduces external effect of recharging space, and lack of lounge for users during the waiting time. These three are essential factors constructing a suggesting model after basic layout, which needs proper measurement on the long recharging time and long waiting time. The essential factors are applied to electric vehicle recharging station layout so that users might use 'digital refresh" i.e. lounge and information contents service during the waiting time which provides convenience of recharging and emotional space with users. Such upgrade recharging station environmental model might resolve the burden of long recharging time which may contribute to the popularization of electric vehicles.

• 대한전자공학회논문지SD
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• 제39권9호
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• pp.37-44
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• 2002

학습된 신경망(Pre-trained neural network)은 고정된 가중치(weight)를 갖는다. 이 논문에서는 이러한 특성을 이용하여 신경망의 효과적인 디지털 하드웨어의 설계방법을 제안한다. 이를 위해 신경망의 PEs(Processing Elements)연산은 행렬-벡터 곱셈으로 표하고 고정된 가중치와 입력 데이터의 관계를 비트-레벨 어레이(array) 구조로 표현하여, 노드 소거와 가중치 비트 패턴에 따른 공유 노드 설정을 통한 최적화로 연산에 필요한 노드를 최소화한다. FPGA 시뮬레이션 결과, 완전한 정확성에 기반한 하드웨어를 설계하는 경우, 하드웨어 비용을 상당부분 줄였고 동작 주파수가 높다는 것을 확인하였다. 또한, 제안한 설계방법은 한정된 공간 내에서 많은 수의 PEs 구현이 가능함으로, 큰 신경망 모델에 대한 온-칩(on-chip) 구현이 가능하다.

• 한국항행학회논문지
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• 제14권3호
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• pp.409-414
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• 2010

최근 IT융합 환경의 성장과 더불어 엘리베이터 시장 역시 지능화를 통한 다양한 서비스 요구가 증대되고 있다. 이에 본 논문에서는 엘리베이터 시스템의 정보 전달 기능을 높이기 위해 기존 엘리베이터 제어 시스템을 확장한 스트리밍 기반의 정보 시스템을 제시하고자 한다. 정보 전달 구조는 인터넷 기반의 서비스 환경을 기반으로 구성되며 이를 바탕으로 다양한 서비스를 엘리베이터 시스템과 통합하여 운영할 수 있다. 또한 IT 융합 구조를 통해 홈 네트워크 및 다양한 전자 기기와의 결함을 통해 엘리베이터 시스템에서발생 가능한 다양한 사용자의 요구를 쉽게 반영함으로써 스마트 엘리베이터 환경을 구축할 수 있을 것이다.

• 디지털융복합연구
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• 제11권2호
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• pp.287-297
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• 2013

본 논문은 OFDM 시스템을 위한 효율적인 가변길이 radix-8/4/2 FFT 구조를 제안하였다. radix-8/4/2 연산을 수행하기 위해서 제안한 FFT 프로세서는 shared memory 구조를 사용하여 하드웨어가 단순하고 적은 면적을 차지한다. 메모리 사이즈를 줄이고 데이터들 간의 충돌을 피하기 위해 효율적인 In-place 메모리 엑세스 방법을 제안한다. 또한 회전인자(twiddle factor)를 위한 ROM 기반의 lookup 테이블 방식을 대신하여 적은 면적을 차지하는 회전인자 발생기를 제안한다. 제안한 FFT 프로세서는 802.11a, 802.16a, DAB, DVB-T/H 그리고 xDSL에서 요구하는 모든 FFT 샘플링 포인트인 64, 256, 512, 1024, 2048, 4096 그리고 8192 포인트의 FFT 연산을 할 수 있다.

• 한국멀티미디어학회논문지
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• 제9권8호
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• pp.963-970
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• 2006

본 논문에서는 저가형 CSTN-LCD(Color Super-Twisted Nematic Liquid Crystal Display)에 사용하는 동영상 프로세서를 제안한다. 제안된 프로세서는 SFP(SubFrame Pattern) 기법을 적용하여 계조 확장을 할 뿐 아니라 플리커(flicker)현상을 제거하였고 BFI(Black Field Insertion) 기법을 적용하여 액정의 응답시간을 보상하였다. 그리고 화질 향상을 위한 에지 강조 기법과 보간기법을 적용하였다. 하드웨어 구조는 FPGA 프로토타입 보드를 사용하여 검증하였다. 제안된 동영상 프로세서는 PDA(Personal Digital Assistants), 모바일 폰과 PMP(Portable Multimedia Player) 등에 사용되어 질 수 있다.

• 한국정보기술응용학회:학술대회논문집
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• 한국정보기술응용학회 2005년도 6th 2005 International Conference on Computers, Communications and System
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• pp.73-76
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• 2005

The advanced information and communication technology gives vehicles another role of the third digital space, merging a physical space with a virtual space in a ubiquitous society. In the ubiquitous environment, the vehicle becomes a sensor node, which has a computing and communication capability in the digital space of wired and wireless network. An intelligent vehicle information system with a remote control and diagnosis is one of the future vehicle systems that we can expect in the ubiquitous environment. However, for the intelligent vehicle system, many issues such as vehicle mobility, in-vehicle communication, service platform and network convergence should be resolved. In this paper, an in-vehicle gateway is presented for an intelligent vehicle information system to make an access to heterogeneous networks. It gives an access to the server systems on the internet via CDMA-based hierarchical module architecture. Some experiments was made to find out how long it takes to communicate between a vehicle's intelligent information system and an external server in the various environment. The results show that the average response time amounts to 776ms at fixec place, 707ms at rural area and 910ms at urban area.