• Journal of the Korean Institute of Telematics and Electronics
• /
• v.24 no.4
• /
• pp.652-657
• /
• 1987

This paper describes an application of CMOS Gate Array Integrated Cricuits to the implementation of three functional units: A Multiplexer, Time Switch, and Demultiplexer in the Switching Network and Digital Line Concentrator of TDX-1 system, which is a fully digital time division electronic switching system in Korea. The application of CMOS Gate Array Integrated Circuits significantly improves the overall system performance in terms of power consumption, cost, size, reliability, and timing margin, etc.

• Journal of Digital Contents Society
• /
• v.10 no.2
• /
• pp.199-207
• /
• 2009

The Q-switching the shutter or the different optical science element puts in within the laser light resonator and the storehouse departs from the within the resonator it loses the mortar and the reversal distribution which when is sufficient creates from within the active medium, opens the shutter instantaneously and it is to do to be made to emit with the light where the energy which is accumulated within the resonator is strong very. Like this Q-switching of laser resonator--It decreases factor increasing suddenly to make. To method of Laser Q-switching mechanical switching methods, electro-optic switching methods and switching by saturable absorber methods, acousto-optic switching method etc. 4 kind are being used on a large scale. In these people the conversion which is electric in compliance with the effect which is electrooptics is widely being used the Q-switching pulse of short pulse width because being it will be able to create. Consequently, Pockel cell where it has the quality of electrooptics effect) the Q-it is become known that it is suitable it uses with switch. From the research which it sees FET and one-chip microprocessor where it is a switching element and pulse transfomer to plan and produce pockel cell Q-switch driving gears, pulse style Nd: It applied in YAG Laser system and it investigated and researched the operating characteristic of the Q-switch. Also, the Q-switch leads and Nd where it is output: YAG with forecast in compliance with a theoretical calculation it comes to buy laser beam side politics it compared and laser beam qualities which had become Q-switching it analyzed.

• Journal of Digital Convergence
• /
• v.11 no.12
• /
• pp.479-485
• /
• 2013

Virtualization is a promising approach to consolidating multiple online services onto a smaller number of computing resources. A virtualized server environment allows computing resources to be shared among multiple performance isolated platforms called virtual machines. Through server virtualization software, applications servers are encapsulated into VMs, and deployed with APIs on top generalized pools of CPU and memory resources. Networking and security have been moved to a software abstraction layer that transformed computing, network virtualization. And it paves the way for enterprise to rapidly deploy networking and security for any application by creating the virtual network. Stochastic reward net (SRN) is an extension of stochastic Petri nets which provides compact modeling facilities for system analysis. In this paper, we develop SRN model of network virtualization based on virtual switch. Measures of interest such as switching delay and throughput are considered. These measures are expressed in terms of the expected values of reward rate functions for SRNs. Numerical results are obtained according to the virtual switch capacity and number of active VMs.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.05a
• /
• pp.143-146
• /
• 2011

A 50-MS/s 10-bit pipelined ADC with 1.2Vpp differential input range is proposed in this paper. The designed pipelined ADC consists of eight stage of 1.5bit/stage, one stage of 2bit/stage, digital error correction block, bias & reference driver, and clock generator. 1.5bit/stage is consists of sub-ADC, DAC and gain stage, Specially, a sample-and hold amplifier (SHA) is removed in the designed pipelined ADC to reduce the hardware and power consumption. Also, the proposed bootstrapped switch improves the Linearity of the input analog switch and the dynamic performance of the total ADC. The reference voltage was driven by using the on-chip reference driver without external reference. The proposed pipelined ADC was designed by using a 0.18um 1-poly 5-metal CMOS process with 1.8V supply. The total area including the power decoupling capacitor and power consumption are $0.95mm^2$ and 60mW, respectively. Also, the simulation result shows the ENOB of 9.3-bit at the Nyquist sampling rate.

• Proceedings of the Optical Society of Korea Conference
• /
• 2005.02a
• /
• pp.292-295
• /
• 2005

Variable optical attenuators (VOA) made of low-loss fluorinated polymers are demonstrated which shows a low operating power less than 30 mW due to the superior thermo-optic effect of polymer material and a low insertion loss less than 1.0 dB by incorporating highly fluorinated polymers to reduce the absorption loss at 1550 nm. An attenuator-integrated low-crosstalk polymeric digital optical switch (DOS) is also demonstrated. The switch and attenuator shares a single connected electrode which is controlled by a single current source. Due to the simple structure of the integrated attenuator, the device length is reduced to 1 cm so as to provide low insertion loss of 0.8 and 1.1 dB for 1300 and 1550 nm, respectively. The attenuator radiates remained optical signal on the switch-off branch in order to decrease the switching crosstalk to be less than -70 dB with an applied electrical power of 200 mW.

• Proceedings of the KIPE Conference
• /
• 2002.07a
• /
• pp.326-329
• /
• 2002

In this paper, a single-phase inverter using a diode bridge-type resonant circuit to implement ZVT(Zero Voltage Transition) switching is presented. The current control algorithm is analyzed about how to design the circuit with auxiliary switch which can ZVT operation for the main power switch. The simulation and experimental results would be shown to verify the proposed current algorithm, because the main power switch is turn on with ZVT and the hi-directional inverter is operated.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
• /
• 2003.02a
• /
• pp.92-94
• /
• 2003

In superconductive digital logic circuits, D2 cells can be used to compose a decoder an important component of an Arithmetic Logic Unit (ALU). In this wor, we simulated D2 cell by using WRspice. D2 cell has one input, one switch input, and two outputs (output1 and output2). D2 cell functions in such way that output1 follows the input and output2 is the complement of the input data, when the switch input is "0, ". However, when there is a switch input "1, " the opposite output signals are generated. In this paper, we optimized a D2 cell by using WRspice, and obtained the minimum margin of 26%. Our optimized D2 cell will play a key role in the ALU fabrication.the ALU fabrication.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.59 no.2
• /
• pp.355-358
• /
• 2010

As CMOS technology continues to scale down, signal processing is favorably done in the digital domain, which requires Analog-to-Digital (A/D) Converter to be integrated on-chip. This paper presents a design methodology of 12-bit 1-MS/s Rail-to-Rail fully differential SAR ADC using Deep N-well Switch based on binary search algorithm. Proposed A/D Converter has the following architecture and techniques. Firstly, chip size and power consumption is reduced due to split capacitor array architecture and charge recycling method. Secondly, fully differential architecture is used to reduce noise between the digital part and converters. Finally, to reduce the mismatch effect and noise error, the circuit is designed to be available for Rail-to-Rail input range using simple Deep N-well switch. The A/D Converter fabricated in a TSMC 0.18um 1P6M CMOS technology and has a Signal-to-Noise-and-Distortion-Ratio(SNDR) of 69 dB and Free-Dynamic-Range (SFDR) of 73 dB. The occupied active area is $0.6mm^2$.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.18 no.5
• /
• pp.477-484
• /
• 2013

This paper proposes a novel switching method of active clamp snubber for efficiency improvement of PV module integrated converter(MIC) system. Recently, MIC solar system is researched about the efficiency and safety. PV MIC system is used active clamp method of snubber circuit for the price and reliability of the system. But active clamp snubber circuit has the disadvantage that system efficiency is decreased for switch operating time because of heat loss of resonant between snubber capacitor and leakage inductance. To solve this problem, this paper proposes a novel switching method of the active clamp. The proposed method is a technique to reduce power consumption by reducing the resonance of the snubber switch operation time and through simulations and experiments proved the validity.

• Journal of IKEEE
• /
• v.14 no.3
• /
• pp.232-235
• /
• 2010

A 60GHz active phase shifter with 65nm CMOS is presented by replacing passive switches in switched-line type phase shifter with active ones. Active-switch phase shifter is composed of active-switch blocks and passive delay network blocks. The active-switch phase shifter design is compact compare with the conventional vector-sum phase shifter. Active-switch blocks are designed to accomplish required input and output impedances whose requirements are different whether the switch is on or off. And passive delay network blocks are composed of lumped L,C instead of normal microstrip line to reduce the size of the circuit. An 1-bit phase shifter is fabricated by TSMC 65nm CMOS technology and measurement results present -4dB average insertion loss and 120 degree phase shift at 65GHz.