• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.11
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• pp.3001-3011
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• 1996

In this paper, using DBNN algorithm which is used in the binary pattern classification or speech signal processing the digital DBNN circuit is designed having the variable expansion depending the size of input data and pattern type. The processing elemen(PE) of the proposed network consists of the synapse and MAXNET circuits for the similarity measurement between reference and input pattern. Global MAXNET selects the global winner among the local winners which is selected in each PE. Through the several simultions, and thus each PE and global MAXNET search the reference pattern that was the most simlar to input pattern for the discord of the pattern.

• Journal of Institute of Control, Robotics and Systems
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• v.18 no.1
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• pp.13-20
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• 2012

This paper proposes a marine engine state monitoring system using a DPQ (Distributed Precedence Queue) mechanism which collects the state of bearings, temperature and pressure of engine through the CAN network. The CAN is developed by Bosch Corp. in the early 1980' for automobile network. The data from various sensors attached in the marine engine are converted to digital by the analog to digital converter and formatted to fit the CAN protocol at the CAN module. All the CAN modules are connected to the SPU (Signal Processing Unit) module for the efficient communication and processing. This design reduces the cost for wiring and improves the data transmission reliability by recognizing the sensor errors and data transmission errors. The DPQ mechanism is newly developed for the performance improvement of the marine engine system, which is demonstrated through the experiments.

• Journal of Ocean Engineering and Technology
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• v.11 no.1
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• pp.96-96
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• 1997

This paper presents a Inertial Measuring Unit(IMU) for motion measurement of an AUV. The IMU is composed of three parts: inertial sensors with three servo accelerometers and three rate gyros, an analog/digital interface board, and a signal processing board with TMS320C31 DSP processor. The IMU is a class of strap-down inwetial navigation system does not applicable directly to the navigation system in consequence of the AUV and integrated sensors for an integrated navigation system of the AUV. Fast calculstion of direction cosine matrix for the coordinate transformation body to reference is obtained through the DSP processor. A switching algotrithm is used to lessen the low frequency drift effect of the gyros in the vertical plane with use of low pass filtering of the signal of the accelerometers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.5A
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• pp.668-673
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• 2000

In this paper, not only the problems which could not be solved with Conventional Importance Sampling and Improved Importance Sampling of the early simulation method, and but also the improvements obtained in terms of computer run-time were studied, by applying the central moment algorithm to the digital communication channels. That is, the channel performance evaluation is done for obtaining the cumulative probability function of the statistical characteristics of received signal with estimating the central moment of the received signal mixed the noise in the digital communication receiver. We confirm the simulation run-time after we implemented the quaternary phase shift keying(QPSK) satellite communication channels using the Signal Processing Worksystem(SPW) of the Cadence incorporation to verify the suggested algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.3
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• pp.612-621
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• 1996

In this paper, we propose the low sidelobe digital FIR doppler filter bank synthesis algorithm through the Gradient Descent method and it can be practially appliable to coherent pulse doppler radar signal processing. This algorithm shows the appropriate calculation of tap coefficients or zeros for FIR transversal fiter which has been employed in radar signal processor. The span of the filters in the filter bank be selected at the desired position the designer want to locate, and the lower sidelobe level that has equal ripple property is achieved than one for which the conventional weithtedwindow is used. Especially, when we implemented filter zeros as design parameters it is possible to make null filter gain at zero frequency intensionally that would be very efficient for the eliminatio of ground clutter. For the example of 10 tap filter synthesis, when filter coefficients or zeros are selected as design parameters the corresponding sidelobelevel is reducedto -70db or -100db respectively and it has good convergent characteristics to the desired sidelobe reference value. The accuracy ofapproach to the reference value and the speed of convergence that show the performance measure of this algorithm are tuned out with some superiority and the fact that the bandwidth of filter appears small with respect to one which is made by conventional weighted window method is convinced. Since the filter which is synthesized by this algorithm can remove the clutter without loss of target signal it strongly contributes performance improvement with which detection capability would be concerned.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.276-281
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• 2005

This paper presents a low voltage operating IF QPSK receiver block which is consisted of programmable gain amplifier (PGA) and analog to digital converter. This PGA has 6 bit control and 250MHz bandwidth, $0{\sim}20\;dB$ gain range. Using the proposed PGA architecture (low distortion gain control switch block), we can process the continuous fully differential $0.2{\sim}2.5Vpp$ input/output range and 44MHz carrier with 2 MHz bandwidth signal at 1.8V supply voltage. Using the sub-sampling technique (input freq. is $44{\sim}46MHz$, sampling freq. is 25MHz), we can process the IF QPSK signal ($44{\sim}46MHz$) which is the output of the 6 bit PGA. We can get the SNDR 35dB, which is the result of PGA and ADC at full gain mode. We fabricated the PGA and ADC and the digital signal processing block of the IF QPSK with the 0.18um CMOS MIM process 1.8V Supply.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.4
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• pp.543-552
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• 1996

The goal of this paper is to developed a DSP based power analyzing and control system by 3-Dimensional (3-D) space current co-ordinates. A developed system is made up of 486-PC and DSP (Digital Signal Processor) board, Active Power Filter, Non-linear thyristor load, and Power analyzing and control program for Windows. Power is analyzed using signal processing techniques based on the correlation between voltage and current waveforms. Since power analysis algorithm is performed by DSP, power analysis is achieved in real-time even under highly dynamic nonlinear loading conditions. Combining control algorithm with power analysis algorithm is performed by DSP, power analysis is achieved in real-time even under highly dynamic nonlinear loading conditions. Combining control algorithm with power analysis algorithm, flexibility of the proposed system which has both power analysis mode and control mode, is greatly enhanced. Non-active power generated while speed of induction motor is controlled by modulating firing angle of thyristor converter, is compensated by Active Power Filter for verifying a developed system. Power analysis results, before/after compensation, are numerically obtained and evaluated. From these results, various graphic screens for time/frequency/3-D current co-ordinate system are displayed on PC. By real-time analysis of power using a developed system, power quality is evaluated, and compared with that of conventional current co-ordinate system. (author). refs., figs. tabs.

• Journal of Broadcast Engineering
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• v.24 no.3
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• pp.485-494
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• 2019

A software-driven real-time frequency de-modulator is implemented with the aid of universal-serial-bus (USB) type software defined radio dongle. An analog stereo frequency modulation (FM) broadcast signal is down-converted to the basedband analog signal then converted to digital bit streams in the USB dongle. Computer software such as Matlab, Python, and GNU Radio manipulates the incoming bit streams with the technique of digital signal processing. Low pass filtering, band pass filtering, decimation, frequency discriminator, double sideband amplitude demodulation, phase locked loop, and deemphasis function blocks are implemented using such computer languages. Especially, GNU Radion is employed to realize the real-time demodulator.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.8
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• pp.1213-1221
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• 2022

In Electronic Warfare, the need to develop a jamming system that protects our location information from enemy radar is constantly increasing. The jamming system normally uses wide-band DRFM(Digital Radio Frequency Memory) that processes the entire bandwidth at once. However, it is difficult to jam if there is a CW(Continuous Wave) interference signal in the band. Recently, instead of wide-band signal processing, a structure using a filter bank that divides the entire band into several sub-bands and processes each sub-band independently has been proposed. Although it is possible to handle interference signal through the filter bank structure, spurious signal occurs when the signal is received at a boundary frequency between sub-bands. Spurious signal makes a output power of jamming signal distributed, resulting in lower JSR(Jamming to Signal Ratio) and less jamming effect. This paper proposes an over-sampled channelized DRFM structure that enables interference response and prevents spurious signal for sub-band boundary frequency input.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.11
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• pp.955-966
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• 2013

We propose two feedback interference cancellers(FICs) to improve the performance of the equalization digital on-channel repeater(EDOCR) with the FIC for the ATSC DTV broadcasting system. The FIC estimates the feedback channel between Tx. and Rx. antennas of the repeater by cross-correlating the reference signal and the feedback signal. Since there is a DC pilot which ruins the white property of the ATSC DTV signals, the FIC cannot estimate the feedback channel accurately. To solve the problem, the structural method which uses an additional DC pilot free reference for feedback channel estimation and the algorithmic method based on the digital signal processing which whitens the ATSC DTV signals and performs the feedback cancellation in the whitened signal domain. Simulation results show that the proposed two FICs show better feedback cancellation performance than the conventional FIC.