• Journal of the Institute of Convergence Signal Processing
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• v.8 no.1
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• pp.44-50
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• 2007

In this paper generating algorithms of the conventional chaos code sequences and a new chaos code sequence derived from the real and imaginary parts of FFT of one chaos code sequence, and the time-frequency function characteristics of generated code sequences to measure the signal resolution, are considered. And two chaos based QCSK digital communication systems-one with two different chaos code sequences, the other with FFT of one chaos code sequence-are analyzed in AWGN and fading communication channels. After analyzing the correlation functions of such sequences, the delta-like autocorrelation and near zero crosscorrelation functions of them are very suitable for chaos based spread spectrum communication systems, is verified. Through evaluating the performance of two chaos based QCSK systems above using Monte-Carlo simulation, the improvement of performance in the latter QCSK system compare favorably with that of the former system, is shown.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.8
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• pp.1491-1496
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• 2009

This paper presents an digital based input/output interface circuit for controlling and monitoring the Diesel Engine Generator for emergency. In order to monitor and control of the Emergency Diesel Engine Generator, controlling and monitoring circuits need 5 analog input channels, 2 pick-up coil measuring circuits, 10 digital input channels containing Broken Wire Detect function, and 7 relay control signal output channels. This system performs signal processing of input signal taking advantage of simple filter circuit, photo-coupler and comparator circuit at analog input parts, and output signals for main relay is designed acting by double control, so it prevents malfunction completely. And it improves accuracy of speed input signal by applying digital circuit that processes rick-up coil signal.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.3
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• pp.197-202
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• 2010

In this paper, multi-channel vital signal monitoring system was implemented for home healthcare. The system able to measure vital signal for example ECG, PPG and temperature simultaneously at patients’ home. The vital signal is an essential parameter for healthcare application and can be easily extracted from patients. The implemented system consist of sensor parts for signal extraction, signal amplifier and filter for analog circuit, analog signal to digital conversion for controlling devices and lastly the monitoring program. The system able to transmit vital signals using Bluetooth wireless communications to personal computer or home server. And the tele-monitoring system able to display real-time signals using web monitoring program. In medical application, the vital signal parameter able to stored and saved in the web server for further medical analysis. This system opens up the possibilities of ubiquitous healthcare where further implementation can be easily done.

• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.6
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• pp.26-30
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• 1977

Redundancies in the Calculation of DFT and FFT are analized and new algorithms are proposed which are capable of reducing the machine time by a considerable amount. New extensions of T.D C.F. and T.D.F.T. are given for the discrete case which permit a deeper insights for the techniques of digital signal Proessing i. e. Discrete Fourier Transform, Convolution Sum and Correlation sequences.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.8
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• pp.1-9
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• 1992

Radio data system is a next-generation broadcasting system of digital information communication which multiplexes the digital data into the FM stereo signal in VHF/FM band and provides important and convenient service features. And radio data are composed of groups which are divided into 4 blocks with information word and check word. In this paper, radio data receiver is developed which recovers and process radio data to provide services. Then we confirm that 7dB SNR is required to be 10S0-5TBER of demodulation. Deconding process of shortened-cyclic-decoder has been simulated by computer. Also, the time-compression (by 16 times) method has been adopted for the RDS features post-processing. Via the error probability calculation, simulation and experimentation, the developed receiver system is proved to satisfy the system specification of EBU and implemented by general logic gates and analog circuits.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.257-260
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• 1999

We have designed a 32-bit RISC microprocessor with 16/32-bit fixed-point DSP functionality. This processor, called YRD-5, combines both general-purpose microprocessor and digital signal processor (DSP) functionality using the reduced instruction set computer (RISC) design principles. It has functional units for arithmetic operation, digital signal processing (DSP) and memory access. They operate in parallel in order to remove stall cycles after DSP and load/store instructions with one or more issue latency cycles. High performance was achieved with these parallel functional units while adopting a sophisticated 5-stage pipeline structure and an improved DSP unit.

• Journal of Korea Society of Digital Industry and Information Management
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• v.14 no.3
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• pp.39-44
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• 2018

Communication in real-time distributed system should have high reliability. To develop group communication Protocol with high reliability, potential fault should be known and when fault occurs, it should be detected and a necessary action should be taken. Existing detection method by Ack and Time-out is not proper for real time system due to load to Ack which is not received. Therefore, group communication messages from real-time distributed processing systems should be communicated to all receiving processors or ignored by the message itself. This paper can make be sure of transmission of reliable message and deadline by suggesting and experimenting fault detection technique applicable in the real time distributed system based on ring, and analyzing its results. The experiment showed that the shorter the cycle of the heartbeat signal, the shorter the time to propagate the fault detection, which is the time for other nodes to detect the failure of the node.

• Proceedings of the KIEE Conference
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• 2001.07a
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• pp.175-177
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• 2001

Frequency and phasor are the most important quantities in power system operation. Frequency reflects the dynamic energy balance between load and generating power. To estimate of power system frequency, an accurate digital tracking algorithm by using phasor angle difference is presented. For an evaluation of the proposed technique, simulations by EMTP have been performed. Test results were showed the algorithm's accuracy under the effect of noise and changes in frequency and amplitude on the input signal.

• Proceedings of the KOSOMBE Conference
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• v.1993 no.05
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• pp.70-73
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• 1993

Design as well as Distortion analysis of signal conditioning filters is very useful for practical applications. Distortion analysis of digital filters for wave forms detection in ECG signals is presented. Several band pass and band reject filters are designed for the analysis. Computer simulations are performed to compare the distortions of the Butterworth type filters and linear phase optimal FIR filters which are widely used for ECG signal processing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.999-1007
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• 2002

In this paper, the operation of matched filter for searching initial synchronization in direct sequence spread spectrum receiver is studied. The implementation model of the matched filter by HDL (Hardware Description Language) is proposed. The model has an architecture based on parallelism and pipeline for fast processing, which includes circular buffer, multiplier, adder, and code look-up table. The performance of the model is analyzed and compared with the implementation by a conventional digital signal processor. It is implemented on a FPGA (Field Programmable Gate Array) and its operation is validated in a timing simulation result.