• Proceedings of the Korean Society of Broadcast Engineers Conference
• /
• 1995.06a
• /
• pp.165-170
• /
• 1995

In this paper, it is attempted to apply the adaptive digital signal processing to compensate for a linear distortion of a loudspeaker and implement a real time hardware for that purpose. The real time system is implemented by using the DSP56001, a general purpose signal processor, as a host processor and the DSP56200, a cascadable adaptive FIR filter peripheral chip, as an adaptive digital filter. The system has 1000 taps at a 44.1kHz. After inverse modeling of under_compensation_speaker, the system reduces loudspeaker's linear distortions by pre-processing an input audio signal to loudspeaker. The experiment shows satisfactory results; after adaption with white noise as input signal for 60sec, the flat amplitude and linear phase frequency characteristics is found to lie over a wide frequency range of 100Hz to 20kHz.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.25 no.2
• /
• pp.119-124
• /
• 1988

Real-time adaptive lattice predictor was implemented on the TMS32020 DSP chip for digital signal processing. The implemented system was composed of Input-Output units and centrla processing-control unit and its supporting assembly soft ware. The performance of hardware realization was verified by comparing input signal and one-step prediction signal which are calcualted by the real-time adaptive lattice predictor. As a result, for 4 stage lattice structure, the maximum running frequency was obtained as 6.41 KHz in this experiment.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2003.10a
• /
• pp.177-177
• /
• 2003

• The Journal of Korea Robotics Society
• /
• v.2 no.3
• /
• pp.205-211
• /
• 2007

In this paper, the prototype of surface EMG (ElectroMyoGram) sensor is developed for the robotic rehabilitation applications, and the developed sensor is composed of the electrodes, analog signal amplifiers, analog filters, ADC (analog to digital converter), and DSP (digital signal processor) for coding the application example. Since the raw EMG signal is very low voltage, it is amplified by about one thousand times. The artifacts of amplified EMG signal are removed by using the band-pass filter. Also, the processed analog EMG signal is converted into the digital form by using ADC embedded in DSP. The developed sensor shows approximately the linear characteristics between the amplitude values of the sensor signals measured from the biceps brachii of human upper arm and the joint angles of human elbow. Finally, to show the performance of the developed EMG sensor, we suggest the application example about the real-time human elbow motion acquisition by using the developed sensor.

• Journal of the Institute of Convergence Signal Processing
• /
• v.12 no.2
• /
• pp.139-144
• /
• 2011

The modern digital logic technology does not yet satisfy the speed requirements of real-time DSP circuits due to synchronized operation of multiplication and accumulation. This operation degrades DSP performance. Therefore, the double-base number system (DBNS) has emerged in DSP system as an alternative methodology because of fast multiplication and hardware simplicity. In this paper, authors propose a novel multiplication architecture. One operand is an output of a flash analog-to-digital converter (ADC) in DBNS format, while the other operand is a coefficient in the IEEE standard floating-point number format. The DBNS digital output from ADC is produced through a new double base number encoder (DBNE). The multiplied output is in the format of the IEEE standard floating-point number (FPNS). The proposed circuits process multiplication and conversion together. Compared to a typical multiplier that uses the FPNS, the proposed multiplier also consumes 45% less gates, and 44% faster than the FPNS multiplier on Spartan-3 FPGA board. The design is verified with FIR filter applications.

• 전자공학회논문지 IE
• /
• v.47 no.4
• /
• pp.18-27
• /
• 2010

This paper is designed the efficient Data Acquisition System for an vibration of rotatory machines. The Data Acquisition System is consist of the analog logic having signal filer and amplifier, and digital logic with ADC, DSP, FPGA and FIFO memory. The vibration signal of rotatory machines acquired from sensors is controlled by the FPGA device through the analog logic and is saved to FIFO memory being converted analog to digital signal. The digital signal process is performed by the DSP using the vibration data in FIFO memory. The vibration factor of the rotatory machinery analysis and diagnosis is defined the RMS, Peak to Peak, average, GAP, FFT of vibration data and digital filtering by DSP, and is need to follow as being happened the event of vibration and make an application to an warning system. It takes time to process the several analysis step of all vibration data and the event follow, also special event. It should be continuously performed the data acquisition and the process, however during processing the input signal the DSP can not be performed to the acquisited data after then, also it will be lose the data at several channel. Therefore it is that the system uses efficiently the DSP and FPGA devices for reducing the data lose, it design to process a part of the signal data to FPGA from DSP in order to minimize the process time, and a process to parallel process system, as a result of design system it propose to method of faster process and more efficient data acquisition system by using DSP and FPGA than signal DSP system.

• Proceedings of the Korea Institute of Convergence Signal Processing
• /
• 2000.12a
• /
• pp.149-152
• /
• 2000

A scanner is an output device that scans documents, photographs, films etc, and convert them to digital data. Especially, a film scanner is used for scanning negative/positive films. In this paper, we design step motor control part, image sensor part, and Aか converter part which are components of the scanner and use DSP for fast signal processing. We also design the interface circuits using EPLD between these peripherals and DSP. The PC interface circuits between scanner and PC are designed by using parallel port to control and transfer the scanned data from scanner to PC. For 35mm film, we design hardwares which obtain high resolution more than 9 million pixels (horizontal resolution is 3835 and vertical resolution is 2592).

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.38C no.7
• /
• pp.623-629
• /
• 2013

This paper presents the implementation result of the EEG(electroencephalogram) signal transmission protocol and its test platform. EEG measured by a dry-type electrode is directly converted into digital signal by ADC(analog-to-digital converter). Thereafter it is transferred DSP(digital signal processor) platform by $I^2C$(inter-integrated circuit) protocol. DSP conducts the pre-processing of EEG and extracts feature vectors of EEG. In this work, we implement the $I^2C$ protocol with 16 channels by using 10 or 12-bit ADC. In the implementation results, the overhead ratio for the 4 bytes data burst transmission measures 2.16 and the total data rates are 345.6 kbps and 414.72 kbps with 10-bit and 12-bit 1 ksps ADC, respectively. Therefore, in order to support a high speed mode of $I^2C$ for 400 kbps, it is required to use 16:1 and $(8:1){\times}2$ ratios for slave:master in 10-bit ADC and 12-bit ADC, respectively.

• The Journal of the Acoustical Society of Korea
• /
• v.8 no.5
• /
• pp.95-101
• /
• 1989

For developing new algorithms or dedicated hardware by using general purpose Digital Signal Processor chip, emulator H/W and simulator S/W are indispensible. But the most of DSP emulators have limitations on H/W flexibility according to their generalized architectures. In this paper, a DSP evaluation system for real time signal processing was developed using TMS 32020. The I/O buffers storing acquisition data of the system were designed to have variable length $(1\sim2048samp1es) &$ sampling frequency $l00\sim8KHz$.

• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.45 no.4
• /
• pp.543-552
• /
• 1996

The goal of this paper is to developed a DSP based power analyzing and control system by 3-Dimensional (3-D) space current co-ordinates. A developed system is made up of 486-PC and DSP (Digital Signal Processor) board, Active Power Filter, Non-linear thyristor load, and Power analyzing and control program for Windows. Power is analyzed using signal processing techniques based on the correlation between voltage and current waveforms. Since power analysis algorithm is performed by DSP, power analysis is achieved in real-time even under highly dynamic nonlinear loading conditions. Combining control algorithm with power analysis algorithm is performed by DSP, power analysis is achieved in real-time even under highly dynamic nonlinear loading conditions. Combining control algorithm with power analysis algorithm, flexibility of the proposed system which has both power analysis mode and control mode, is greatly enhanced. Non-active power generated while speed of induction motor is controlled by modulating firing angle of thyristor converter, is compensated by Active Power Filter for verifying a developed system. Power analysis results, before/after compensation, are numerically obtained and evaluated. From these results, various graphic screens for time/frequency/3-D current co-ordinate system are displayed on PC. By real-time analysis of power using a developed system, power quality is evaluated, and compared with that of conventional current co-ordinate system. (author). refs., figs. tabs.