• Journal of Power Electronics
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• v.9 no.3
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• pp.410-417
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• 2009

This paper represents a design and implementation of a digital controller for a multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The multi-phase SBC has generally been used for a voltage regulation module (VRM) of a microprocessor because of its high current handling capability at a low output voltage. The VRM requires high control performance of tight output regulation, high slew rate, and load sharing capability of multiple converters. In order to achieve these requirements, the design and implementation of a digital control system for a multi-phase SBC are presented in this paper. The digital PWM generation, current sensing, and voltage and current controller using a DSP TMS320F2812 are considered. The experimental results are provided to show the validity of the implemented digital control system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.3
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• pp.69-80
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• 2015

This paper is writing about developing magnet power supply. It is very important for power supply to obtain output current in high precision and high stability. As a switching noise and a power noise are the cause of disrupting the stability of output current, to remove these at the front end, low pass filter with 300Hz cutoff frequency is designed and placed. And also to minimize switching noise of the current into magnet and to stop abrupt fluctuations, output filter should be designed, when doing this, we design it by considering load has high value inductance. As power supply demands the stability of less than 5ppm, high precision 24bit(300nV/bit) analog digital converter is needed. As resolving power of 24bit(300nV/bit) analog digital converter is high, it is also very important to design the input stage of analog digital converter. To remove input noise, 4th order low pass filter is composed. Due to the limitation of clock, to minimize quantization error between 15bit DPWM and output of ADC having 24bit resolving power, ${\Sigma}-{\Delta}$ modulation is used and bit contracted DPWM is constituted. And before implementing, to maximize efficiency, simulink is used.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.16 no.2
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• pp.291-297
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• 1998

In order to accomplish the digital map production I/O devices should be used which are used for data input procedure to convert original paper map(hardcopy) data into computer compatible digital map data, and for the mapsheet output procedure of worked out data. For the input device, digitizer and scanner are most frequently used. Digitizer has possibility of direct production of digital data, and are mainly used for input procedure of partly plotted source map. In contrary, scanner is rather easy to operate the instrument, so that is widely used for the input procedure of original sheet map. In this study, to extract the input device characteristics, some kinds of digitizers and scanners were cheesed and used for the positional error analysis through the operational method and types of instruments. Also for the output device characteristics, some kinds of plotter and materials are used and compared to analyze the positional error through the instrumental types and output sheet materials.

• Journal of Korea Society of Digital Industry and Information Management
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• v.10 no.1
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• pp.55-60
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• 2014

Today, there is increasing the elderly population in rural community, and people of returning from the urban to the rural community are demand to be of high value-added agriculture. In this time, there are required to regularization, standardization, automation, for getting of production of high value crops. In this paper, we are study for automation cultivation control system design for produce high-value crops. this system were designed of two parts that one part is measure and control unit, another part is server part for database and server side control. the main controller for measurement and control is used MC9S08AW60, server for Database and server-side control was using MySQL with CentOS. The source code of control program was coding C and compile with GCC. the functions of measurement and control unit are digital input and output each 8channels and can be scan-able of 20 Bit with 2CH/Sec. Analog Output were designed that can be output of 4-20mA or 0-5V on 4channel. The Digital input and output part were designed 8-channel, and using the high speed photo coupler and relays. We showed that system is possible to measure a 20bit data width, 2Ch/sec as 8 channel analog signals.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.498-503
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• 2005

As important device that decide output load in superannuated thermoelectric power plant which do Turbine Load Set Motor device. This generation of electric power system operated Set Up Range Motor according to Set Up value that operator manufactures by hand circumvolve, and generation of electric power output load derision is consisted by internal action including Motor Therefore, in this research passively output load operated Turbine Motor Drive equipment that can have existing Turbine Load Set Motor Performance developing Digital Drive Unit device design. Also control algorithm implementation and existing Turbine Load Set Motor Drive and connection possibility through designed controlling system to connect basis function that decide development output load with Digital Drive Unit that designed also with existing Motor Drive Unit and can be operated.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.08a
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• pp.17-20
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• 2000

In a digital communication system, the transmission channel may introduce error into the digital signal being transmitted. It would be useful if a process could be devised so that the error could be removed in order to recover the transmitted digital signal. We design a corrective filter that is inverse filter, which will generate an output signal identical to the input signal. in order for two systems connected in cascade to produce an output which is identical to the input signal, the over-all unit sample response of the cascade connection must be a unit sample function.

• ETRI Journal
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• v.29 no.4
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• pp.463-469
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• 2007

A phase-locked loop (PLL) is described which is operable from 0.4 GHz to 1.2 GHz. The PLL has basically the same architecture as the conventional analog PLL except the locking information is stored as digital code. An analog-to-digital converter is embedded in the PLL, converting the analog loop filter output to digital code. Because the locking information is stored as digital code, the PLL can be turned off during power-down mode while avoiding long wake-up time. The PLL implemented in a 0.18 ${\mu}m$ CMOS process occupies 0.35 $mm^2$ active area. From a 1.8 V supply, it consumes 59 mW and 984 ${\mu}W$ during the normal and power-down modes, respectively. The measured rms jitter of the output clock is 16.8 ps at 1.2 GHz.

• Journal of the Korean Graphic Arts Communication Society
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• v.25 no.1
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• pp.65-80
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• 2007

The input and output device requires precise color representation and CMS (Color Management System) because of the increasing number of ways to apply the digital image into electronic publishing. However, there are slight differences in the device dependent color signal among the input and output devices. Also, because of the non-linear conversion of the input signal value to the output signal value, there are color differences between the original copy and the output copy. It seems necessary for device-dependent color information values to change into device-independent color information values. When creating an original copy through electronic publishing, there should be color management with the input and output devices. From the devices' three phases of calibration, characterization and color conversion, the device-dependent color should undergo a color transformation into a device-independent color. In this paper, an experiment was done where the input device used the linear multiple regression and the sRGB color space to perform a color transformation. The output device used the GOG, GOGO and sRGB for the color transformation. After undergoing a color transformation in the input and output devices, the best results were created when the original target underwent a color transformation by the scanner and digital camera input device by the linear multiple regression, and the LCD output device underwent a color transformation by the GOG model.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1288-1293
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• 2005

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The CMIEDDs represents extension valued multiple-output functions, while TDBM systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1190-1199
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• 2016

This study proposes a classification and compensation algorithm of two non-ideal output signals of a resolver to reduce position errors. Practically, a resolver generates position errors because of amplitude imbalance and quadrature imperfection between the two output signals of the resolver. In this study, a digital signal processor system based on a resolver-to-digital converter is used to reconstruct the two output signals of the resolver. The two output signals, "sin" and "cos," can be represented by a unit circle on the xy-plot. The classification and compensation of the errors can be obtained by using the radius and area of the circle made by the resolver signals. The method computes the integration of the areas made by the two resolver output signals to classify and compensate the error. This system cannot be applied during transient response given that the area integration during the transient state causes an error in the proposed method. The proposed method does not need any additional hardware. The experimental results verify the effectiveness of the proposed algorithm.