• ETRI Journal
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• v.35 no.4
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• pp.697-705
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• 2013

Emerging trends in the area of digital very large scale integration (VLSI) signal processing can lead to a reduction in the cost of the cochlear implant. Digital signal processing algorithms are repetitively used in speech processors for filtering and encoding operations. The critical paths in these algorithms limit the performance of the speech processors. These algorithms must be transformed to accommodate processors designed to be high speed and have less area and low power. This can be realized by basing the design of the auditory filter banks for the processors on digital VLSI signal processing concepts. By applying a folding algorithm to the second-order digital gammatone filter (GTF), the number of multipliers is reduced from five to one and the number of adders is reduced from three to one, without changing the characteristics of the filter. Folded second-order filter sections are cascaded with three similar structures to realize the eighth-order digital GTF whose response is a close match to the human cochlea response. The silicon area is reduced from twenty to four multipliers and from twelve to four adders by using the folding architecture.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.11
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• pp.3087-3093
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• 2009

Digital filters are indispensible element in digital signal processing area. The performance of digital filter based on adding and multiplying operation, such as computational speed and power consuming is determined by the orders and coefficients of filter which has on effect area of semiconductor chip when it is implemented by VLSI technology. In this research, in order to performance improvement of digital filter, we proposed the algorithm to speed-up the operation of digital filter associated with the minimum signed digit representation of binary number system and method to simplify the digital filter design associated with common subexpression elimination. The performance of proposed method is evaluated by the computational speed and design-simplicity by experimental implemented digital filter on FPGA.

• Journal of the Korean Society of Radiology
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• v.15 no.1
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• pp.1-7
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• 2021

In order to acquire an image in a positron emission tomography, it is necessary to draw the position coordinates of the scintillation pixels of the detector module measured at the same time. To this end, in a detector module using a plurality of scintillation pixels and a small number of photosensors, it is necessary to obtain a flood image and divide a region of each scintillation pixel to obtain a position of a scintillation pixel interacting with a gamma ray. Alternatively, when the number of scintillation pixels and the number of photosensors to be used are the same, the position coordinates for the position of the scintillation pixels can be directly acquired as digital signal coordinates. A method of using a plurality of scintillation pixels and a small number of photosensors requires a process of obtaining digital signal coordinates requires a plurality of photosensors and a signal processing system. This complicates the signal processing process and raises the cost. To solve this problem, in this study, we developed a method of obtaining digital signal coordinates without performing the process of separating the planar image and region using a plurality of flash pixels and a small number of optical sensors. This is a method of obtaining the position coordinate values of the flash pixels interacting with the gamma ray as a digital signal through a look-up table created through the signals acquired from each flash pixel using the maximum likelihood function. Simulation was performed using DETECT2000, and verification was performed on the proposed method. As a result, accurate digital signal coordinates could be obtained from all the flash pixels, and if this is applied to the existing system, it is considered that faster image acquisition is possible by simplifying the signal processing process.

• Proceedings of the KIEE Conference
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• 2002.04a
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• pp.96-98
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• 2002

This paper proposes the digital pin line checker which can extremely improve the efficiency of the pine line checking using a micro processor. The line checker is designed which can check efficiently up to maximum 2048 pin. Alarm busser is designed ringing real-timely the case that the pin line is connected differently with real node number. Accordingly the comparing and identifying work visually the node number showing on the displaying board with real node number is avoided after the electronic stimulus enforce to the pin of the fixture by the test engineer. The digital line checker is designed based on the 8051. And the effectiveness and accuracy of the proposed line checking strategy is tested by simulating the several error connections for pin lines on the small scale board.

• Journal of Korean Library and Information Science Society
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• v.52 no.4
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• pp.179-203
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• 2021

This study aims to grasp the key issues and the direction for digital divide research in South Korea. Based on the 488 KCI journal articles published between 2003 and 2020, the authors analyzed the changes in the number of articles per year and the subject areas of journals. Furthermore, the topic modelling and keyword network anlaysis were applied to identify the subjects of research. The main findings can be summarized as follows: first, there was a stable trend for a while after the number of articles had increased by the year of 2007, and then there has been a sharp increase since 2019. Second, digital divide research has been conducted from diverse fields including social science, multidiscipline, and engineering. Third, the six subject areas were identified which are 'digital divide among regions', 'digital divide among people with disabilities', 'technical environment of digital divide', 'divide from information use and its consequence', 'legal and institutional environments of digital divide', and 'digital divide of the elderly'. Finally, it was shown that the areas of 'divide from information use and its consequence' and 'technical environment of digital divide' have attracted attention recently.

• Smart Structures and Systems
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• v.31 no.3
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• pp.275-281
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• 2023

In recent years, technological developments have rapidly increased the number of complex structures and equipment in the industrial. Accordingly, the prognostics and health monitoring (PHM) technology has become significant. The safety assessment of industrial sites requires data obtained by installing a number of sensors in the structure. Therefore, digital twin technology, which forms the core of the Fourth Industrial Revolution, is attracting attention in the safety field. The research on digital twin technology of structures subjected to seismic loads has been conducted recently. Hence, this study proposes a digital twin system that estimates the responses and arbitrary load in real time by utilizing the minimum sensor to a pipe that receives a seismic and arbitrary load. To construct the digital twin system, a finite-element model was created considering the dynamic characteristics of the pipe system, and then updating the finite-element model. In addition, the calculation speed was improved using a finite-element model that applied the reduced-order modeling (ROM) technology to achieve real-time performance. The constructed digital twin system successfully and rapidly estimated the load and the point where the sensor was not attached. The accuracy of the constructed digital twin system was verified by comparing the response of the digital twin model with that derived by using the load estimated from the digital twin model as input in the finite-element model.

• Journal of Digital Convergence
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• v.11 no.3
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• pp.293-298
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• 2013

We consider about software quality nowadays. The company considers about software quality more and more compare to software development. We analyze the software testing data in this paper. We find the software effect according to the number of testing, the number of testing date, the number of fault according to characteristics. Also, we analyze the result by regression. Also, we propose the testing effect by sex.

• Journal of Korea Society of Digital Industry and Information Management
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• v.4 no.3
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• pp.45-53
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• 2008

As internet is wide spread, the number of internet service provider is increased. Internet service providers gather the personnel information with inhabitants registration identification number for the user management and the adult authentication. The personnel information is spreaded thorough the Internet by the system hacking, mismanagement and malicious resale. And the personnel information is used for spam email, phishing scams, etc. by malicious others. So the Ministry of Information and Communication Republic of Korea developments I-PIN system of the personnel identification. But, I-PIN has some problem the guideline for it and the method of 5 I-PIN services. In this paper, we analyze the problem about the guideline for I-PIN and the method of 5 I-PIN services. And we propose the countermeasure about the problem.

• Journal of Korea Society of Digital Industry and Information Management
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• v.6 no.4
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• pp.297-305
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• 2010

Employment number by areas is composed of various factors for groups and time series. In this paper, we use the panel data for finding various variables and using this, we analyzed the factors that is major influence to employment number by areas. For analysis we looked at employment number by areas, the region for analysis consist of seven groups, that is, the metropolitan city(such as Busan, Daegu, Incheon, Gwangiu, Daejeon, Ulsan.) and Seoul. Analyzing period be formed over a 63 time points(2005.01.- 2010.03). We examined the data in relation to the employment number by occupational job, unemployment rate, monthly household income, preceding business composite index, consumer price index, composite stock price index. In looking at the factors which determine employment number by areas job, evidence was produced supporting the hypothesis that there is a significant negative relationship between unemployment rate and monthly household income the consumer price index. The consumer price index and composite stock price index are significant positive relationship, preceding business composite index is positive relationship, it are not significant variables in terms of employment number by areas job.

• Journal of Korea Society of Digital Industry and Information Management
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• v.10 no.1
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• pp.1-6
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• 2014

In this paper, we propose a CPLD low power algorithm considering the structure. The proposed algorithm is implemented CPLD circuit FC(Feasible Cluster) for generating a problem occurs when the node being split to overcome the area and power consumption can reduce the algorithm. CPLD to configure and limitations of the LE is that the number of OR-terms. FC consists of an OR node is divided into mainly as a way to reduce the power consumption with the highest number of output nodes is divided into a top priority. The highest number of output nodes with the highest number of switching nodes become a cut-point. Division of the node is the number of OR-terms of the number of OR-terms LE is greater than adding the input and output of the inverter converts the AND. Reduce the level, power consumption and area. The proposed algorithm to MCNC logic circuits by applying a synthetic benchmark experimental results of 13% compared to the number of logical blocks decreased. 8% of the power consumption results in a reduced efficiency of the algorithm represented been demonstrated.