• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.139-141
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• 2006

Quantum-dot Cellular Automata (QCA) is one of the most promising next generation nano-electronic devices which will inherit the throne of CMOS which is the domineering implementation technology of large scale low power digital systems. In late 1990s, the basic operations of the QCA cell were already demonstrated on a hardware implementation. Also, design tools and simulators were developed. Nevertheless, its design technology is not quite ready for ultra large scale designs. This paper proposes a new approach which enables the QCA designs to inherit the verification methodologies and tools of CMOS designs, as well. First, a set of disciplinary rules strictly restrict the cell arrangement not to deviate from the predefined structures but to guarantee the deterministic digital behaviors. After the gate and interconnect structures of the QCA design are identified, the signal integrity requirements including the input path balancing of majority gates, and the prevention of the noise amplification are checked. And then the digital logic is extracted and stored in the OpenAccess common engineering database which provides a connection to a large pool of CMOS design verification tools. Towards validating the proposed approach, we designed a 2-bit QCA adder. The digital logic is extracted, translated into the Verilog net list, and then simulated using a commercial software.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.721-724
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• 2006

This paper presents a method of the constructing the digital logic switching functions and realizing the circuit design using partition techniques. First of all, we introduce the necessity, background and concepts of the partition design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the building block, based on each partition functions. And we apply the proposed method to the example, and we compare the results with the results of the earlier methods. In result, we describe the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.793-794
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• 2011

This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.398-399
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• 2019

This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

• Journal of Engineering Education Research
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• v.12 no.2
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• pp.89-95
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• 2009

This thesis investigated way of employment, education course of a training school of Programmable Logic Controller a Field. I inquired into a demand of an engineer and a necessary level of professional education. As a result, I have a purpose in what offer the information that cared for a beginning to work elevation and education training and boat development of a student more than. Faced a human power demand in an education demand and a field rehearsal student demand and analyzed it. The sample extraction used industrial classification, work of scale, Assignment sample extraction way (quota sampling). All data called at a silver phone and the investigated, The data parser analyzed the statistics that used Microsoft Excel.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.4 no.1
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• pp.56-62
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• 2004

This research attempts to suggest a detecting method for cutting position of an object using the neural network, which is one of intellectual methods, and the digital image processing method. The extraction method of object information using the image data obtained from the CCD camera as a replacement of traditional analog sensor thanks to the development of digital image processing. Accordingly, this research determines the threshold value in binary-coding of an input image with the help of image processing method and the neural network for the real-time gray-leveled input image in substitution for lighting; as a result, a specific position is detected from the processed binary-coded image and an actual system designed is suggested as an example.

• Journal of the Regional Association of Architectural Institute of Korea
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• v.21 no.5
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• pp.161-168
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• 2019

The use of various digital tools makes freeform modeling possible. At the same time, with the development of structural and construction technologies, Free-Form Architecture are beginning to be implemented realized, as the desired data extraction such as the size and coordinate points of the members is possible. Currently, in many cities around the world, Irregular-Shaped High-rise Buildings, which express the dynamic symbolism, are recognized for their landmark values. In order to realize the Irregular-Shaped High-rise Buildings, it is necessary to understand various fields such as the characteristics of digital tools, digital technique logic, design process, and construction method. In particular, it is important to plan Irregular-Shaped High-rise Buildings so that the various types of efficiency can be reviewed together, while generating understanding and formations from the initial design stage. Therefore, this study uses conceptual and parametric design tools related to form generation in digital architecture to analyze the details, methods, and characteristics of the Irregular-Shaped High-rise Buildings form generation process. In this paper, the parametric design tool is applied to study the various types of design and the process characteristics that can be considered in the initial design stage of the unstructured skyscraper.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.107-116
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• 2009

Quantum-dot Cellular Automata (QCA) is one of the most promising next generation nanoelectronic devices which will inherit the throne of CMOS which is the domineering implementation technology for large scale low power digital systems. In late 1990s, the basic operations of the QCA cell were already demonstrated on a hardware implementation. Also, design tools and simulators were developed. Nevertheless, its design technology is not quite ready for ultra large scale designs. This paper proposes a new approach which enables the QCA designs to inherit the verification methodologies and tools of CMOS designs, as well. First, a set of disciplinary rules strictly restrict the cell arrangement not to deviate from the predefined structures but to guarantee the deterministic digital behaviors is proposed. After the gate and interconnect structures of. the QCA design are identified, the signal integrity requirements including the input path balancing of majority gates, and the prevention of the noise amplification are checked. And then the digital logic is extracted and stored in the OpenAccess common engineering database which provides a connection to a large pool of CMOS design verification tools. Towards validating the proposed approach, we designed a 2-bit adder, a bit-serial adder, and an ALU bit-slice. For each design, the digital logic is extracted, translated into the Verilog net list, and then simulated using a commercial software.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.5
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• pp.509-520
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• 1992

AIGaAs /GaAs HBT OR /NOR gate. which can be used for high speed digital system was designed. Equivalent circuit parameters of HBT were obtained from Gummel-Poon's model and direct extraction method. Simulation results with PSPI CE showed that propagation delay time and cutoff toggle frequency of designed gate were 25ps and 200Hz, respectively. the designed gate exhibited superior properties to the recently reported HBT ECL and MESFET SCFL when considering the fan-out characteristics and noise margin.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.16 no.1
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• pp.21-26
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• 2016

Canine cataract is developed with aging and can cause the blindness or surgical treatment if not treated timely. The first observation must be made by pet owners but they do not have proper equipment and knowledge to see the abnormalities. In this paper, we propose an intelligent image processing method to extract canine cataract suspicious object from non-professional equipment such as ordinary digital camera and cellular phone photographs so that even casual owners of pet dog can make a pre-diagnosis of such a surgery-needed disease as soon as possible. The experiment shows that the proposed method is successful in most cases except the dog has similar colored hair to the color of cataract.