• Transactions of the Korean Society of Automotive Engineers
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• v.4 no.2
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• pp.1-10
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• 1996

The objective of this paper is to develop a motion base for the vehicle driving simulator. Kinematic analysis are carried out to obtain maximum strokes and velocities of hydraulic actuators. Hydraulic control forces of the actuators are estimated by inverse dynamic analysis. Finally, an optimal design is performed to find attachment points of the actuators so that control forces are minimized. A control logic for the motion base is developed to make the motion base follow the given reference signals. The control logic is implemented on a digital signal processor(DSP) board.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.469-471
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• 1999

In this paper, the method of Space-Vector Pulse Width Modulation(SVPWM) with Fuzzy Logic Regulator(FLR) is proposed. In a conventional SVPWM, the procedures of phase transformation and choosing PWM patterns are complex. So, it should be implemented with high performance processor like Digital Signal Processor(DSP). In order to reduce a calculation burden, a proposed system adopts FLR. Using a linguistic contro strategy based on expert knowledge, FLR relieves the processor from a heavy computations. In simulations, the proposed system is validated.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.91-94
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• 2000

This paper introduces the design of low-power, fast-locking delay locked-loop using complementary pass transistor logic(CPL). Low-power design has become one of the most important in the modem VLSI application. CPL has the advantage of fast speed, high density, and low power with signal buffering between stages. Based on this analysis, we concluded that the I/O performance can be beyond 500㎒, 2-poly, 2-metal 0.65$\mu\textrm{m}$, 3.3V supply.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.911-914
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• 2003

A logic design training kit with print port emulation function was developed. The input device of the kit was 4$\times$4 key input and 6 FND(DYNAMIC) and LCD were used as out put devices and the output device were also can controlled by PC connectde by print port to the kit. The emulator was coded by Visual Programming C++(MFC)

• IT SoC Magazine
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• s.5
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• pp.30-34
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• 2005

전체 반도체 시장이 연평균 10.7% 성장할 것으로 예측되고 있는 중, DRAM과 Flash가 메모리반도체 시장을 주도적으로 끌어나갈 것으로 예상되며 SoC 분야에서는 Digital Signal Processor (DSP), General Purpose Logic, Standard Linear가 시장을 주도적으로 이끌어 나갈 것으로 점쳐진다. 특히 General Purpose Logic은 SoC 전체에서 가장 높은 13.6%의 성장을 기록하면서 전체 반도체 시장에서 차지하는 비중도 5.9%에서 6.9%로 1% 상승하여 빠른 성장을 보이면서 시장 내의 비중이 제고될 것으로 예상된다

• Proceedings of the KAIS Fall Conference
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• 2006.05a
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• pp.236-239
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• 2006

500MW급 대용량 보일러 통풍계통의 Fan Stall 감시 장치는 Fan 이상 발생시 Fan을 보호하기 위하여 정지시키는 기능을 한다. 그러나 Fan Stall 감시 장치의 빈번한 고장으로 신뢰성이 저하되고 운전에 영향을 미치므로 이것을 DCS Logic으로 구성하여 신뢰성을 향상시켰다.

• Proceedings of the KSR Conference
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• 2002.10b
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• pp.995-1000
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• 2002

This paper presents general concept of DC switch gear(DCSWGR). Normally, DCSWGR consist of Digital protection unit(DPU), High Speed Circuit Breaker(HSCB), Disconnect Switch (DS), Programmable Logic Control(PLC), Auxiliary Relays and etc. Most of the components has its special characteristics and their interface between each others are various and complex. In this paper every constituent general design are preceded and interface between each component are examined. And also DCSWGR operation logic with logical diagram including interlock signal are introduced.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2402-2404
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• 1998

This paper proposes a translation method that converts ladder diagrams to binary executable codes for PLC (programmable logic controller)s. A PLC based on general purpose DSP(digital signal processor) validates the method. We performed a benchmark on the system that compares the execution time of the interpretation method and ours. Experimenal result shows how fast this method executes programs that consist of codes generated.

• Proceedings of the KAIS Fall Conference
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• 2003.06a
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• pp.208-210
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• 2003

In spite of the presence of various kind of Integrated Circuits it's not always easy to get the right part. Besides, it is hard to find a vendor fer a small quantity consumers like who develop prototype applications. In this study, we've tried to get the logical signals from the PC based device we've developed that correspondents with the real ICs. It can emulate decoder ICs, multiplexers, demultiplexers and basic logic gates.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.22-27
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• 1996

A digital logic demodulator for binary FSK signals is presented. The operation is based on the quadricorrelator which is known as an ideal frequency detector. The demodulator is especially suitable for high-speed application, and it can be easily implemented in integrated circuit. Computer simulation results show that the performance of the receiver with digital demodulator converges to that of analog quadricorrelator receiver as the number of mixing axes is increased and the optimum bandwidth depending on a modulation index is slightly wider than that of analog demodulator.