• Journal of IKEEE
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• v.3 no.2 s.5
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• pp.186-195
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• 1999

In this paper, the RF-modules composed of front-end, frequency synthesizer, modulator/demodulator and power control multi channel WLL personal system for W-CDMA using 10 [MHz] RF channel bandwidth has been implemented and considered. The measured transmission power is 250 [mW] which is very close to the required value. The measured flatness of power at the final output stage is ${\pm}1.5[dB]$ over the required bandwidth of the receiver. In addition, it is found that the chip rate transmitting spread signal is set to 8.192 [MHz], the required rate. The frequencies of RF_LO signal and LO signal of the modulator and the demodulator measured by a frequency synthesizer are satisfied with design requirements. The operating range of the receiving strength signal indicator and AGC units shows 60 [dB] respectively. Also the measured phasor diagram and eye pattern for deciding the RF modules compatible with baseband digital signal processing part are shown good results.

• Journal of the Korean Magnetics Society
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• v.7 no.6
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• pp.327-333
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• 1997

We designed and constructed the high frequency magnetic characteristics measurement system to measure core loss, B-H curve, permeability of toroidal ferrite core, amorphous core and various materials for high frequency application. The system consists of universal equipments such as digitizing oscilloscope, signal generator, power amplifier, PC in order to make upgrade easily. The power source is composed of waveform synthesizer and power amplifier ranging from DC to 20 MHz, and output signal H and B from sample core are digitized by oscilloscope with sampling rate 1 GS/ s per channel. Computer controls power source and oscilloscope, reads data from oscilloscope, displays analyzed waveform and saves data with file. The entire procedures finishes within few seconds.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.195-196
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• 2007

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO, five divide-by-2 circuits and several buffers. The simulation results show that the designed circuit has a phase noise at 10kHz better than -87dBc/Hz throughout the signal band and consumes 10mA from a 1.8V supply.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.10B
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• pp.1464-1469
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• 2001

본 논문에서는 디지털 하이브리드 위상고정루프(Digital Hybrid Phase-Locked Loop, DHPLL) 주파수 합성기 구조에서 고 순도 스펙트럼과 초고속 스위칭 속도를 위한 설계기술을 제안한다. D/A 변환기 출력으로 전압제어발진기(Voltage Controlled Oscillator, VCO)를 구동하는 개 루프(open-loop) 구성 방식과 기존 위상고정루프(Phase Locked Loop, PLL)의 폐 루프(closed-loop) 구성 방식을 혼합한 하이브리드 구조의 주파수 합성기를 고려하여, 시스템 변수(개 루프 대역과 위상 여유)와 성능 파라미터(정착시간, 위상 잡음, 그리고 최대 오버슈트(Max. overshoot)의 관계를 연구하였다. 그리고 이 관계를 통해 스펙트럼 순도와 스위칭 속도를 향상시키기 위한 최적의 3가지 설계방안을 제시한다. 컴퓨터 시뮬레이션 결과, 주파수 스위칭 과정에서 발생하는 최대 오버슈트가 0.0991%이고 완전 정상상태 도달시간은 0.288msec이다. offset 주파수 10KHz에서 위상 잡음은 -128.15dBc이다.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.8
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• pp.1-7
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• 1997

In tis paper, w eproposed a modeling for direct-sequence spread communication base band modem in RT-level VHDL and implemented in a one-chip VLSI and tested. The transmitter modulates with DQPSK modulation method and spreads a modulated signal with 32-bit PN code into 1.152MHz. The receiver de-spreads a signal using 32-tap matched filter and recovers with DQPSK demodulation method. The digital frequency synthesizer generates the sine signal and the cosine signal of 2.304MHz with ROM tables in the size of 7$\^$*/256 and 6$\^$*/256, respectively. The implemented VLSI has been verified a BER with 10$\^$-4/ at E$\_$b//N$\_$o/ of 13dB with a SPW fixed design model and fabricated in the 0.8.mu.m KG6423 gate array with a VHDL model.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.9
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• pp.974-978
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• 2003

The down-converter of the WCDMA Digital Optic Repeater is developed. Based on the system specifications, the structure of the down-converter is accomplished and its block diagram is drawn. The down-converter is implemented according to these block diagrams. Subsequently a low pass filter, an automatic level controlled attenuator, a frequency synthesizer and other components for the down-converter are designed and implemented, and a main board to integrate these modules is also manufactured. To reduce the noise floor of system and suppress the RF spurious noise, a PCB layout is performed carefully. For each module consisting of the down-converter and the entire system, the performance tests are accomplished to check the performance about the specifications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.6
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• pp.900-909
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• 1999

The receiving part of the RF system for the digital TRS base stations is developed in this paper. Based on the system specifications, the structure of the RF system is accomplished and its block diagram is drawn. The RF system is implemented according to these block diagrams. Subsequently the RF band-pass filter, the low noise amplifier, the automatic level controlled attenuator, the frequency synthesizer and other components for the system are designed and implemented, and a main board to integrate these modules is also manufactured. To lower the noise floor of the system and suppress the RF spurious noise, a PCB layout is performed carefully. For each module consisting of the RF system and the entire system, the performance tests are accomplished to check the specifications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.2
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• pp.259-266
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• 1998

406MHz and INMARSAT-E EPIRB facility transmits the distress alerts by the relay of the polar-satellites and INTELSAT, but may cause the probability of delayed transmission because of the orbital period and not compliance with the implementation of GMDSS rules for small ships in A1 area.. Digital Selective Calling forms a critical part of the terrestrial elements of the GMDSS system and ensures the reliability and the efficiency in the system. In this paper, we suggests that new DSC EPIRB in the VHF band to overcome this defect for small ships in A1 area, and analyze the ITU-R recommendations and technical characteristics, design and implement the algorithm of calling sequences, frequency synthesizer for the RF signal and FSK moulation signals.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.4
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• pp.805-817
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• 1999

In this paper, the needs for introduction and adoption of MㆍHF DSC/NBDP system and for developments of its circuits and call sequences for use in the maritime mobile services for small-ships, leisure-ships and fishing ships are analyzed, discussed. Also design and implement for MㆍHF(1.6-4MHz) DSC/NBDP system is discussed. Most of casualties have been arisen from small-ships and fishing ships during last 5 years. So, the SAR schematic plans should been prepared to prevent casualties and facilitate the activities of SAR for those ships. DSC/NBDP for MㆍHF system is able to fulfill the roles of efficient SAR communication functions, and to advance the SAR system to small ships and fishing ships. This study is focused on the techniques of processing the DSC call sequences and the ARQ sequences of NBDP system. Especially ARQ sequences are expanded into processing of Korean letters, designed the call sequences and code conversion algorithm for Korean-code. It will be evaluated the availability of Korean-NBDP system. In designing the Transmitting circuits and Receiving circuits, for the carrier generation, DDS(Direct Digital Synthesizer) is used in stead of the Phase Locked Loop and frequency conversion by the mixer, BPF. And PSK modulation signals are directly generated by the controls of DDS, which show the characteristics of Spurious Free Dynamic Range are below -62dBc. Also, the monolithic U subsystem IC which provides various functional components, AD608 is used for designing the receiving circuitsㆍAnd the algorithm of Phasing methode for FSK demodulation are devised to process IF frequency 455kHz in the IF circuits.

• Journal of electromagnetic engineering and science
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• v.7 no.4
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• pp.161-168
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• 2007

A fast correlative vector direction finding(CVDF) system using active dipole antenna array for mobile direction finding(DF) applications is presented. To develop the CVDF system, the main elements such as active dipole antenna, multi-channel direction finder, and search receiver are designed and analyzed. The active antenna is designed as composite structure to improve the filed strength sensitivity over the wide frequency range, and the multi-channel direction finder and search receiver are designed using DDS-based PLL with settling time of below 35 us to achieve short signal processing time. This system provides the capabilities of the high DF sensitivity over the wide frequency range and allows for high probability of intercept and accurate angle of arrival(AOA) estimation for agile signals. The design and performance analysis according to the external noise and modulation schemes of the CVDF system with five-element circular array are presented in detail.