• Title/Summary/Keyword: Digital Filter Method

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Dynamic Characteristics of DC-DC Converters Using Digital Filters

  • Kurokawa, Fujio;Okamatsu, Masashi;Ishibashi, Taku;Nishida, Yasuyuki
    • Journal of Power Electronics
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    • v.9 no.3
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    • pp.430-437
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    • 2009
  • This paper presents the dynamic characteristics of buck and buck-boost dc-dc converters with digital filters. At first, the PID, the minimum phase FIR filter and the IIR filter controls are discussed in the buck dc-dc converter. Comparisons of the dynamic characteristics between the buck and buck-boost converters are then discussed. As a result, it is clarified that the superior dynamic characteristics are realized in the IIR filter method. In the buck converter, the undershoot is less than 2% and the transient time is less than 0.4ms. On the other hand, in the buck-boost converter, the undershoot is about 3%. However, the transient time is approximately over 4ms because the output capacitance is too large to suppress the output voltage ripple in this type of converter.

Color Filter Array Interpolation Method Using Neural Networks (신경망을 이용한 Color Filter Array 보간 기법)

  • 고진욱;이철희
    • Proceedings of the IEEK Conference
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    • 2000.06d
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    • pp.242-245
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    • 2000
  • In this paper, we present a color interpolation technique based on artificial neural networks for a single-chip CCD (charge-coupled device) camera with a Bayer color filter array (CFA). Single-chip digital cameras use a color filter array and an interpolation method in order to regenerate high quality color images from sparsely sampled images. We applied 3-layer feedforward neural networks in order to interpolate missing pixel from surrounding pixels. And we compared the proposed method with conventional interpolation methods such as the proposed interpolation algorithm based on neural networks provides a better performance than the conventional interpolation algorithms.

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A Voltage Disturbance Detection Method for Computer Application Loads (컴퓨터 응용 부하들을 위한 전압 외란 검출 방법)

  • 최재호
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.245-248
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    • 2000
  • In this paper a novel method for voltage disturbance detection is presented. This is a instantaneous detection method using normalized error get in synchronous reference frame and also it is implemented in digital. Feedback noise the problem of digital implementation is removed by a digital filter of which the time delay is compensated through numerical analysis.

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A Design of Low Power Digital Matched Filter using Rounding for IMT-2000 Communication Systems (IMT-2000 통신시스템에서의 라운딩을 이용한 저전력 디지털 정합필터의 설계)

  • Park, Ki-Hyun;Ha, Jin-Suk;Nam, Ki-Hun;Cha, Jae-Sang;Lee, Kwang-Youb
    • Journal of IKEEE
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    • v.8 no.1 s.14
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    • pp.145-151
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    • 2004
  • For wide-band spread spectrum communication systems such as IMT-2000, a digital matched filter is a key device for rapid spreading code synchronization. Although a digital matched filter can be implemented easily, large power consumption at the higher chip rate and large summation delay of longer chip length are the bottleneck of practical use. In this paper, we propose a optimized partial correlation digital matched filter structure which can be constructed of the so-called generalized hierarchical Golay sequence. a partial correlation structure can reduce the number of correlators, but enlarge the size of flip-flops. In this paper, The proposed approach focuses on efficient circuit size, power dissipation, maintaining the operating throughput. A proposed digital matched filter reduce the size of flip-flops by rounding method. and it reduces about 45 percentages of power dissipation and chip area as compared with digital matched filter which is not rounded. rounding. The proposed architecture was verified by using Xilinx FPGA.

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Low sidelobe digital doppler filter bank synthesis algorithm for coherent pulse doppler radar (Coherent 레이다 신호처리를 위한 저부엽 도플러 필터 뱅크 합성 알고리즘)

  • 김태형;허경무
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.3
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    • pp.612-621
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    • 1996
  • In this paper, we propose the low sidelobe digital FIR doppler filter bank synthesis algorithm through the Gradient Descent method and it can be practially appliable to coherent pulse doppler radar signal processing. This algorithm shows the appropriate calculation of tap coefficients or zeros for FIR transversal fiter which has been employed in radar signal processor. The span of the filters in the filter bank be selected at the desired position the designer want to locate, and the lower sidelobe level that has equal ripple property is achieved than one for which the conventional weithtedwindow is used. Especially, when we implemented filter zeros as design parameters it is possible to make null filter gain at zero frequency intensionally that would be very efficient for the eliminatio of ground clutter. For the example of 10 tap filter synthesis, when filter coefficients or zeros are selected as design parameters the corresponding sidelobelevel is reducedto -70db or -100db respectively and it has good convergent characteristics to the desired sidelobe reference value. The accuracy ofapproach to the reference value and the speed of convergence that show the performance measure of this algorithm are tuned out with some superiority and the fact that the bandwidth of filter appears small with respect to one which is made by conventional weighted window method is convinced. Since the filter which is synthesized by this algorithm can remove the clutter without loss of target signal it strongly contributes performance improvement with which detection capability would be concerned.

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FPGA implementation of A/D converter using stochastic logic (FPGA를 이용한 확률논리회로 A/D 컨버터의 구현)

  • 이정원;심덕선
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.847-850
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    • 1998
  • One of the most difficult problem of designing VLSI is a mixed-circuit design, that is to design circuit containing both analog parts and digital parts. Digital to analog converter and analog to digital converter is a typical case. Especially it can be a serious problem when mixed circuit are put into a large digital circuit like microcontroller. However nowadays this problem is settled by separating analog circuit parts outside the IC. This technique is based on converting a digital signal into a pulse sequence. Then an analog signal is obtained by averaging this pulse sequence at the external low-pass filter. An anlog to digital converter is designed using a stochastic logic instead of a traditional PWM (pulse-width modulation) signal and ins implemente dusing FPGa. Stochastic pulse sequence can be made as a simple circuits and moreover can be mathematically processed by simple circuits -AND gates. The spectral property of stochastic pulse sequence method is better than that of PWM method. So it make easy to design a external low-pass filter. This technique has important advantages, especially the reduction of the ADC cost.

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General Coupling Matrix Synthesis Method for Microwave Resonator Filters of Arbitrary Topology

  • Uhm, Man-Seok;Lee, Ju-Seop;Yom, In-Bok;Kim, Jeong-Phill
    • ETRI Journal
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    • v.28 no.2
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    • pp.223-226
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    • 2006
  • This letter presents a new approach to synthesize the resonator filters of an arbitrary topology. This method employs an optimization method based on the relation between the polynomial coefficients of the transfer function and those of the $S_{21}$ from the coupling matrix. Therefore, this new method can also be applied to self-equalized filters that were not considered in the conventional optimization methods. Two microwave filters, a symmetric 4-pole filter with four transmission zeros (TZs) and an asymmetric 8-pole filter with seven TZs, are synthesized using the present method for validation. Excellent agreement between the response of the transfer function and that of the synthesized $S_{21}$ from the coupling matrix is shown.

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Level order Recursive Median Filter by Spatial Histogram (공간 히스토그램을 이용한 레벨 순서별 Recursive Median Filter)

  • 조우연;최두일
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.6
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    • pp.195-208
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    • 2004
  • Histogram is a very useful method on various practical aspect. With increasing importance of simple calculation method and convenience, it became the basic method in digital image processing nowadays. However, basic limit of using histogram is losing spatial position information of pixels on image. This paper reanalyzes image by presenting histogram with spatial position information(spatial histogram). Also using that result, level order recursive median filter is realized. Presented recursive median filter showed much improved results on edge maintenance aspect compared to existing recursive median filter.

A Study of Digital filter for context-awareness using multi-sensor built in the smart-clothes (멀티센서 기반 스마트의류에서 상황인지를 위한 디지털필터연구)

  • Jeon, Byeong-chan;Park, Hyun-moon;Park, Won-Ki;Lee, Sung-chul
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.05a
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    • pp.911-913
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    • 2013
  • The user's context awareness is important to the reliability of sensors data. The sensor data is constantly change to external temp, internal& external environment and vibration. This noise environment is affecting that the data collected information from sensors. Of course this method of digital filter and inference algorithm specifically request for the use of ripple noise and action inference. In this paper, experiment was a comparison of the KF(Kalman Filter) and WMAF(Weight Moving Average Filter) for noise decrease and distortion prevention according to user behavior. And, we compared the EWDF(Extended Weight Dual Filter) with several filer. In an experiment, in contrast to other filter, the proposed filter is robust in a noise-environment.

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A Study on the Implementation of Digital Filters with Reduced Memory Space and Dual Impulse Response Types (기억용량 절약과 순회방식 선택이 가능한 디지털 필터의 구성에 관한 연구)

  • Park, In Jung;Rhee, Tae Won
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.6
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    • pp.950-956
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    • 1986
  • In this paper, a direct addressing mode of a microprocessor is introduced to save memory capacity, and also a dedicated digital filter is constructed to speed up the filter processing and to enable an easy selection of the impulse response types. A theoretical analysis has been conducted on the errors caused by the finite word klength, rounding-off and multiplication procedures. The digital filter designed by the proposed method is made into a module which can function as a 7th-order recursive or a 14-order nonrecursive type with a simples witch operation. The proposed filter is implemented on a printed-circuit board. The frequency characteristics of this filter can be controlled by the multiplication values stored in ROMs. A low-pass, a high-pass and a band-pass filter have been designed and their frequency characteristics are verified by actual measurements. For a order higher filer, two filter modules have been cascaded into an integrated filter of 23rd-order non-recursive low-pass type and a 12th-order recursive multiband type. Their frequency characteirstics have been found to agree with the theory.

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