• 조명전기설비학회논문지
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• 제26권9호
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• pp.64-72
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• 2012

The interest in wind power generation area such as developing and operating wind-diesel pilot complex in remote and island regions that have difficulty in having power plant and connecting to power system is growing rapidly in the world. We have installed and researched the hybrid system in Sekgok Pilot Complex to meet the new generation system. From the monitored data of the system, the performance of each diesel power plant is outstanding. However, step out problem was detected with respect to load sharing and synchronization with decentralized power supply. An advanced controller design having better response time and stability is needed to solve such problem. In this paper, we proposed the algorithm, through digital controller of Governor, which is applied to hybrid system. As a result, we obtained the stable frequency value in variable loading conditions. Also, we proved the advanced response time and stability through the simulation and experiment by applying additional current signal to the control algorithm.

• 전기학회논문지
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• 제65권12호
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• pp.2000-2007
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• 2016

Generally, in order to implement the CRM(Critical Conduction Mode), the analog controller is used rather than a digital controller because the control is simple and uses less power. However, according to the semiconductor technology development and various user needs, digital control system based on a DSP is on the rise. Therefore, in this paper, the CRM bridgeless PFC converter based on a digital control is proposed. It is necessary to detect the inductor current when it reaches zero and peak value, for calculating the on time and off time by using the current information. However, in this paper, the on-time and off-time are calculated by using the proposed algorithm without any current information. If the switching-times are calculated through the steady-state analysis of the converter, they do not reflect transient status such as starting-up. Therefore, the calculated frequency is out of range, and the transient current is generated. In order to solve these problems, limitation method of the on-time and off-time is used, and the limitation values are varied according to the voltage reference. In addition, in steady state, depending on the switching frequency, the inductance is varied because of the resonance between the inductor and the parasitic capacitance of the switching elements. In order to solve the problem, inductance are measured depending on the switching frequency. The measured inductance are used to calculate the switching time for preventing the transient current. Simulation and experimental results are presented to verify the proposed method.

• Journal of Electrical Engineering and Technology
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• 제12권4호
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• pp.1529-1536
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• 2017

A digital dual-channel interleaved phase-shift full-bridge converter is investigated in this paper, and its topology and principle are analyzed. To realize current sharing and stabilize the output voltage, a controller with current sharing loop and closed voltage loop is employed. In addition, current sharing will increase the output current fluctuation and a new digital interleaved driving technology is proposed to reduce the output current ripple. To verify the analysis, simulation and experiments are carried out, which shows the effectiveness of the proposed control strategies.

• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• 한국조명전기설비학회지:조명전기설비
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• 제10권3호
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• pp.55-63
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• 1996

본 논문에서는 CRPWM 인버터로 구동되는 유동전동기의 벡터젝어를 구현하였다. 회전자자속은 회전자 좌표계 자속모델을 이용하여 추정하였으며 전류제어기는 고정좌표계 삼각파 비교 제어기를 사용하였다. 회전자자속의 추정, 속도제어기, 자속제어기, 벡터회전, 상 변화 등의 연산은 80C196 마이크로 콘트롤러를 사용하여 실시간 제어를 하였으며 전류 제어기는 마이크로 콘트롤러의 처리부담을 덜어주기 위해 아날로그회로로 구현하였다. 제안한 시스템에 대하여 시뮬레이션을 통하여 타당성을 검토하였으며 실험을 통하여 전류제어 특성과 시스템의 과도 응답 특성이 우수함을 보였다.

• 한국정밀공학회지
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• 제19권8호
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• pp.155-160
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• 2002

In this paper, a controller design for brushless linear motor is implemented. The designed controller is mainly composed of current, speed and position controller, which are carried out by the high-speed digital signal processor (DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented by using 32-bit DSP (TMS320C31), a high-integrated logic device (EPM7192), and IPM (Intelligent Power Module) for compact and powerful system design. The experimental results show the effective performance of controller for the brushless linear motor.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2001년도 춘계학술대회 논문집
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• pp.167-169
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• 2001

In this paper, a controller design for high speed and stiffness linear motor is implemented. The designed controller is mainly composed of speed and current controller, which are carried out by the high-speed digital signal processor(DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented by using 32-bit DSP(TMS320C31), a high-integrated logic device(EPM7128), and IPM(Intelligent Power Module) for compact and powerful system design. The experimental results show the effective performance of controller for high speed and stiffness linear motor.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 심포지엄 논문집 정보 및 제어부문
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• pp.252-254
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• 2006

The recent improvement in the performance of digital processor, the application of control technology, which used in the HVDC(High Voltage Direct Current) system with the digital processors, has increased. Having this research development as the basis, this paper presents an achievement of progression by tuning the parameter of PI controller based on Genetic Algorithms(GAs) and by controlling with PI controller with a developed simulator by applying the Matrix operating function, voltage source switching element, modified nodal analysis which can include transformer and the backward Euler which does not create the problem of numerical oscillation. As a result, I expect this development in the simulator HVDC System to bring more application in the field of control technology research with an expanded practicality.

• 전력전자학회논문지
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• 제7권3호
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• pp.253-261
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• 2002

본 논문에서는 TMS320F240 DSP를 통해 제어되는 디지털 히스테리시스 제어기를 사용한 Switched Reluctance Motor(SRM)의 위치제어시스템을 제안하였다. SRM은 구조가 간단하고 효율이 놀지만 전동기 구동 특성상 전력용 반도체 소자를 이용한 구동 시스템이 필수적이기 때문에 일반 전동기 제어시스템에 비해 전체 시스템의 제작비용이 증가하게 된다. 이러한 단점을 극복하고 SRM의 활용성을 높이기 위해서는 제어용 드라이브가 필수적으로 요구되는 서보시스템으로서와 SRM 제어시스템을 개발하는 것이다. 따라서 본 연구에서는 시스템 개발과 구현에 있어 아날로그 히스테리시스 제어기를 사용할 경우 하드웨어적인 방법에 의한 파라메타 수정 및 제작의 문제점을 해결하고 전체적인 시스템의 개발단가를 낮추기 위해 DSP내에서의 연산을 통해 제어되는 디지털 히스테리시스 제어기를 설계하여 SRM의 위치제어 시스템을 구현하였으며, 실헐을 통해 제어 및 응답특성을 고찰함으초써 서보 구동 시스템으로서의 SRM의 이용 가능성을 확인하였다.

• 조명전기설비학회논문지
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• 제26권5호
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• pp.71-78
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• 2012

This paper presents a digital control solution to process capacitor current feedback of high performance single-phase UPS for non-linear loads. In all UPS the goal is to maintain the desired output voltage waveform and RMS value over all unknown load conditions and transient response. The proposed UPS uses instantaneous load voltage and filter capacitor current feedback, which is based on the double regulation loop such as the outer voltage control loop and inner current control loop. The proposed DSP-based digital-controlled PWM inverter system has fast dynamic response and low total harmonic distortion (THD) for nonlinear load. The control system was implemented on a 32bit Floating-point DSP controller TMS320C32 and tested on a 5[KVA] IGBT based inverter switching at 11[Khz]. The validity of the proposed scheme is investigated through simulation and experimental results.