• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.768-776
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• 2014

Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.

• KEPCO Journal on Electric Power and Energy
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• 제6권4호
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• pp.473-480
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• 2020

In this paper, we proposed a high frequency equivalent circuit considering parasitic impedance components for differential noise analysis on the input stage during DC-DC buck converter switching operation. Based on the proposed equivalent circuit model, we presented a method to measure parasitic impedance parameters included in DC bus plate, IGBT, and PCB track using the gain phase method of a network analyzer. In order to verify the validity of this model, a DC-DC prototype consisting of a buck converter, a signal analyzer, and a LISN device, and then resonance frequency was measured in the frequency range between 150 kHz and 30 MHz. The validity of the parasitic impedance measurement method and the proposed equivalent model is verified by deriving that the measured resonance frequency and the resonance frequency of the proposed high frequency equivalent model are the same.

• 정보처리학회논문지:컴퓨터 및 통신 시스템
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• 제8권9호
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• pp.225-230
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• 2019

최근 사물인터넷 기술의 발전과 함께 하드웨어 디바이스에서 측정하는 센싱 데이터를 보호하기 위해 다양한 방식의 암호화 알고리즘을 채택하고 있다. 그 중 전 세계에서 가장 많이 사용하는 암호화 알고리즘인 AES(Advanced Encryption Standard) 또한 강력한 안전성을 바탕으로 많은 디바이스에서 사용되고 있다. 하지만 AES 알고리즘은 DPA(Differential Power Analysis), CPA(Correlation Power Analysis) 같은 부채널 분석 공격에 취약하다는 점이 발견되었다. 본 논문에서는 부채널 분석 공격 대응방법 중 가장 널리 알려진 마스킹 기법을 적용한 AES 알고리즘의 소프트웨어 최적화 구현 기법을 제시한다.

• 한국생산제조학회지
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• 제18권3호
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• pp.279-284
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• 2009

This study investigates the stress at gear by modelling differential gear and using FEM. When gear is driven under power, high equivalent stress of 1596.2MPa is occurred at the stationary shaft. Maximum equivalent stress of 1596.2MPa is also occurred at the bottom and root of tooth and its fatigue life becomes 12.4 as the shortest cycle. As much as it becomes away from the center of gear, the maximum deformation becomes occurred. As exact power is delivered with the precise design of gear, the loss of power energy can be decreased.

• Journal of Electrical Engineering and Technology
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• 제9권1호
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• pp.45-51
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• 2014

Distribution system is a critical link between customer and utility. The control of power loss is the main factor which decides the performance of the distribution system. There are two methods such as (i) distribution system reconfiguration and (ii) inclusion of capacitor banks, used for controlling the real power loss. Considering the improvement in voltage profile with the power loss reduction, later method produces better performance than former method. This paper presents an advanced evolutionary algorithm for capacitor inclusion for loss reduction. The conventional sensitivity analysis is used to find the optimal location for the capacitors. In order to achieve a better approximation for the current candidate solution, Opposition based Differential Evolution (ODE) is introduced. The effectiveness of the proposed technique is validated through 10, 33, 34 and85-bus radial distribution systems.

• 전기의세계
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• 제14권6호
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• pp.1-7
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• 1965

This paper provides the analysis of the differential amplifier using the insulated gate, metala-oxide-semiconductor type field-effect-transistor(MOS FET), for its active element and the power drift of the amplifer. From these analytical considerations some design standardsn were found for the MOS FET differential amplifier available for the measurement of the very small current (pico-ampare range). A differential amplifier was designed and built in the view of above considerations. Its equivalent input gate voltages of the thermal drift and the power drift were 0.57mV/.deg. C in the range 25.deg. C-60.deg. C and 8.8mV/V in the range of 20% drift of its orginal value, respectively.

• 한국정밀공학회지
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• 제18권3호
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• pp.205-215
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• 2001

Continuously variable transmission(CVT) mechanisms considered here combine the functions of a 2K-H I type differential gear unit and a V-belt continuously variable unit(CVU). One shaft of the V-belt CVU is connected directly to the differential gear unit and remaining shaft of it is linked to the output shaft. These mechanisms have many advantage which are the decrease of CVT size, the increase of overall efficiency, the extension of speed ratio range, and the generation of geared neutral. In this paper six different mechanisms of output coupled type CVT are proposed. Some useful theoretical formula related to speed ratio, power flow and efficiency are derived and analyzed, and theoretical analysis are proven by various experiments.

• 정보보호학회논문지
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• 제31권6호
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• pp.1127-1136
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• 2021

전력 분석 공격에서 소비 전력 파형의 잡음과 정렬 불량은 공격 성공 여부를 좌우하는 주요한 요인이다. 따라서 이를 완화하기 위한 여러 연구가 수행되고 있으며 웨이블릿 변환 기반의 신호처리 방법도 그중 하나이다. 대부분의 웨이블릿을 사용한 연구에서는 파형 압축할 수 있는 이산 웨이블릿 변환을 사용해 왔는데, 그 이유는 연속 웨이블릿변환 기법이 선택된 스케일의 개수에 따라 데이터 크기 및 분석 시간이 증가할 뿐만 아니라 효율적인 스케일 선택 방법도 없기 때문이다. 본 논문에서는 전력 분석 공격에 최적화된 연속 웨이블릿 변환의 효율적인 스케일 선택 방법을 제안하며 이를 이용해 파형을 인코딩할 경우 분석 성능이 크게 향상될 수 있음을 보인다. 비프로파일링 공격인 CPA(Correlation Power Analysis) 및 DDLA(Differential Deep Learning Analysis) 공격 실험 결과, 제안하는 방법이 잡음 감쇄와 파형 정렬에 효과적임을 확인하였다.

• International Journal of Precision Engineering and Manufacturing
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• 제3권3호
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• pp.28-36
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• 2002

The continuously variable transmission (CVT) mechanism considered here is the output coupled type which combines the functions of a 2K-H I type differential gear unit and a V-belt type continuously variable unit (CVU). One shaft of the CVU is connected directly to the output shaft and another shaft of it is linked to the differential gear unit. It is shown that some fundamental relations (speed ratios, power flows and efficiencies) for twelve mechanisms previously described are valid by various experimental studies, six of them produce a power circulation and the others produce a power split. Parametric analysis is carried out in relation to the efficiency, speed ratio and power ratios in order to assist in the design of an optimum configuration. Some useful properties associated with power flow modes also are discussed in the output coupled type continuously variable transmission.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2000년도 춘계학술대회논문집B
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• pp.199-204
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• 2000

A low temperature differential model stirling engine is manufactured, and its operation characteristics are measured and analyzed by SIMPLE analysis model, in which heat transfer processes are simply considered. The heat transfer coefficients between working fluid and heat sources in the analysis are estimated by comparing the P-V diagrams by experiment and by analysis. This result may be very useful for further design and manufacture of model Stilting engines as well as real engines because it provides a comparatively correct predictions of the operation conditions and power output. It will be also conveniently used as an educational material for mechanical engineering students because it can be a nice example of optimal design process to decide the phase angle and compression ratio of engine design with a simple but realistic simulation.