• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.825-828
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• 2005

In this paper, we propose a new nonvolatile unit memory cell and proposal peripheral circuit using the polymer material. Memory that relies on bistable behavior- having tow states associated with different resistances at the same applied voltage - has attracted much interest because of its nonvolatile properties. Such memory may also have other merits, including simplicity of structure and manufacturing, and the small size of memory cells. We have plotted the load line graphs for the use of a polymer memory character, hence we have designed in the band-gap reference shape of a write/erase drive, and then designed in the 2-stage differential amplifier shape of a sense amplifier in the consideration of a low current characteristic of a polymer memory cell. The simulation result shows that is has high gain about 80dB by sensing the very small current.

• Journal of the Optical Society of Korea
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• 제11권4호
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• pp.153-157
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• 2007

We have proposed an application of disturbance observer with PID controller to minimize gain-transient time of wavelength-division-multiplexing(WDM) multi channels in optical amplifier in channel add/drop networks. We have dramatically reduced the gain-transient time to less than $3{\mu}sec$ by applying a disturbance observer with a proportional/integral/ differential(PID) controller to the control of amplifier gain. The theoretical analysis on the 3-level erbium-doped fiber laser and the disturbance observer technique is demonstrated by performing the simulation with co-simulation of the $MATLAB^{TM}$ and a numerical modeling software package such as the $Optsim^{TM}$.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1117-1120
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• 2003

In this paper, a 1.5V CMOS high frequency operational amplifier for high frequency signal processing systems is presented. For obtaining the high gain and the high unity gain frequency with the 1.5V supply voltage, the op-amp is designed with simple two stages which are consisting of the rail-to-rail differential input stage and the class-AB output stage. The designed op-amp operates with the 1.5V supply voltage, and shows well the push-pull class-AB operation. The simulation results show the DC open loop gain of 77dB and the unity gain frequency of 100MHz for the 1㏁ ┃ 10pF load. When the resistive load R$_1$. is varied from 1㏁ to 1 ㏀, the DC open loop gain decreases by only 4dB.

• 전자공학회논문지A
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• 제31A권12호
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• pp.91-99
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• 1994

We used CMOS current mirror and differenial amplifier to find out how the degradation of each devices in circuit affect total circuit performance. The devices in circuit wer degraded by hot-carrier generated during circuit operation and total circuit performance were changed according to the change of each device parameters. To examine the circuit performance phenomena of current mirror, we analyzed three diffent kinds of current mirrors and made correlation model between circuit performance and stressed device parameters, and compare hot-carrier immunity of these circuits. Also we analyzed how the performance of differential amplifier degraded from the initial value after hot-carrier stress incircuit operations.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권3호
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• pp.168-172
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• 2005

In this paper, we present a new adaptive biasing scheme for CMOS op-amps. The designed circuit has been used in an Operational Transconductance Amplifier (OTA) with ${\pm}1$ V power supply, and it has improved the positive and negative slew rates from 2.92 V/msec to 1242 V/msec and from 1.56 V/msec to 133 V/msec respectively, while maintaining all the small-signal performance parameter values the same as that without adaptive biasing (as expected), however, there was a marginal decrease of the dynamic range. The most useful features of the proposed circuit are that it uses a very low number of components (thus not creating severe area penalty) and requires only 25 nW of extra stand-by power.

• Journal of the Optical Society of Korea
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• 제18권1호
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• pp.65-70
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• 2014

This paper presents the simulation and design of an all-optical subtractor using a quantum-dot semiconductor optical amplifier Mach-Zehnder interferometer (QD-SOA MZI) structure consisting of two cascaded switches, the first of which produces the differential bit. Then the second switch produces the borrow bit by using the output of the first switch and the subtrahend data stream. Simulation results were obtained by solving the rate equations of the QD-SOA. The effects of QD-SOA length, peak power and current density have been investigated. The designed gate can operate at speeds of over 250 Gb/s. The simulation results demonstrate a high extinction ratio and a clear and wide-opening eye diagram.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.247-249
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• 2007

This paper proposes a dry-type surface myoelectric sensor for the myoelectric hand prosthesis. The designed surface myoelectric sensor is composed of skin interface and processing circuits. The skin interface has one reference and two input electrodes, and the reference electrode is located in the center of two input electrodes. Considering the conduction velocity and the median frequency of the myoelectric signal, the inter-electrode distance (IED) between two input electrodes as 18mm, 20mm, and 22mm is selected. The signal processing circuit consists of a differential amplifier with a band pass filter, a band rejection filter for rejecting 60㎐ power-line noise, amplifier, and a level circuit. Using SUS440, six prototype skin interface with different reference electrode shape and IED is fabricated, and their output characteristics are evaluated by output signal obtained from the forearm of a healthy subject. The experimental results show that the skin interface with parallel bar shape and the 18mm IED has a good output characteristics. The fabricated dry-type surface myoelectric sensor is evaluated for the upper-limb amputee.

• ETRI Journal
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• 제45권4호
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• pp.690-703
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• 2023

Multistage amplifiers have become appropriate choices for high-speed electronics and data conversion. Because of the large number of high-impedance nodes, frequency compensation has become the biggest challenge in the design of multistage amplifiers. The new compensation technique in this study uses two differential stages to organize feedforward and feedback paths. Five Miller loops and a 500-pF load capacitor are driven by just two tiny compensating capacitors, each with a capacitance of less than 10 pF. The symbolic transfer function is calculated to estimate the circuit dynamics and HSPICE and TSMC 0.18 ㎛. CMOS technology is used to simulate the proposed five-stage amplifier. A straightforward iterative approach is also used to optimize the circuit parameters given a known cost function. According to simulation and mathematical results, the proposed structure has a DC gain of 190 dB, a gain bandwidth product of 15 MHz, a phase margin of 89°, and a power dissipation of 590 ㎼.

• 전자공학회논문지
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• 제51권9호
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• pp.82-90
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• 2014

본 논문에서는 선형성을 가진 파노라믹 스캔 라이다(PSL) 시스템용의 4-채널 차동 트랜스임피던스 증폭기 어레이를 0.18-um CMOS 공정을 이용하여 구현하였다. PSL시스템을 위한 성능의 비교분석을 위하여 전류모드 및 전압모드의 두 종류 트랜스임피던스 어레이 칩을 각각 구현하였으며, 채널당 1.25-Gb/s 동작속도를 갖도록 설계하였다. 먼저 전류모드 칩의 경우, 각 채널 광 수신입력단은 전류미러 구조로 구현하였으며, 특히 로컬 피드백 입력구조로 개선하여 낮은 입력저항과 낮은 잡음지수를 가질 수 있도록 설계하였다. 칩 측정 결과, 채널 당 $69-dB{\Omega}$ 트랜스임피던스 이득, 2.2-GHz 대역폭, 21.5-pA/sqrt(Hz) 평균 잡음 전류 스펙트럼 밀도, -20.5-dBm 수신감도, 및 1.8-V 전원전압에서 4채널 총 147.6-mW 소모전력을 보이며, 1.25-Gb/s 동작속도에서 크고 깨끗한 eye-diagram을 보인다. 한편, 전압모드 칩의 경우, 각 채널 광 수신입력단은 인버터 입력구조로 구현하여 낮은 잡음지수를 갖도록 설계하였다. 칩 측정 결과, 채널 당 $73-dB{\Omega}$ 트랜스임피던스 이득, 1.1-GHz 대역폭, 13.2-pA/sqrt(Hz) 평균 잡음 전류 스펙트럼 밀도, -22.8-dBm수신감도, 및 4채널 총 138.4-mW 소모전력을 보이며, 1.25-Gb/s 동작속도에서 크고 깨끗한 eye-diagra을 보인다.

• 한국통신학회논문지
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• 제28권10A호
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• pp.807-815
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• 2003

MultiCode-CDMA(MC-CDMA) 시스템은 채널수가 증가할수록 신호의 PAPR(Peak to Average Power Ratio)이 증가하게 되어 증폭기의 비선형 특성에 의해 시스템 성능이 열화된다. MultiPhase Clipped MultiCode CDMA(MP-CDMA)[1] 시스템은 이러한 증폭기의 비선형 특성에 의한 시스템 성능 열화를 상쇄한다. 본 논문에서는 변조방식을 MPSK가 아닌 차동 부호화된 MPSK 방식을 사용했고 이렇게 변형된 시스템을 DMP-CDMA 시스템이라고 부를것이다. 차동 검출 방식을 적용한 DMP-CDMA 시스템은 위상 보정을 위한 모듈이 필요없고, 파일럿(pilot) 신호를 위한 추가적인 데이터 전송이 필요 없다는 장점을 가진다. 그러나 동기 검출을 사용한 시스템에 비해서 약 4.0dB의 성능열화를 보인다. 차동 검출 방식을 사용한 DMP-CDMA 시스템의 성능 열화를 보상하기 위해서 다중 심볼 차동 검출 방식을 적용한 결과 차동 검출 방식에 비해서 약 3.6dH의 성능 개선 효과를 보았다.