• Korean Journal of Crystallography
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• v.16 no.2
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• pp.141-148
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• 2005

It is well known that the general metals have a lot of grain boundaries. The grain boundaries play a negative role to increase the resistivity and to decrease the conductivity. The small resistivity and the large conductivity have been a goal of the material scientists, and no signal noise, perfect signal transfer, and the realization of the real sound are the dream of electronic engineers and audio manias. Generally, oxygen free copper (OFC) and Ohno continuous casting (OCC) copper cables have been used for the purpose of the precise signal transfer and low noise. However they still include a lot of grain boundaries. In our study, we have grown the single crystal by the Czochralski method and succeeded to produce single crystal wires from the crystal in the dimension of $0.5{\times}0.5{\times}2500mm$. The produced wire still possesses very good single crystal properties. We observed the structure of the wire, and measured the resistance and impedance. Glow Discharge Spectrometer (GDS) was used for analyzing the compositions of copper single crystals and commercial copper. Current-Voltage curve, resistance, total harmonic distortion and speaker frequency response were measured for comparing electrical and acoustic properties of two samples.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.4
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• pp.54-60
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• 2008

It is impossible to database(DB) the patterns of power cable events and cause analysis of faulted cable because the product liability(PL) law have been enforced in Korea, since 2002. In additions, simulation and pattern of power cable events are needed for DB system under accelerated deterioration. In this paper, we tested for resistance to cracking of cable below the 22.9[kV] class due to thermal stresses. This method of exam is following IEC 60811-3-1(Common test methods for insulating and sheathing materials of electric cables). From the results, The 22.9[kV] class A power cable was discolored on the surface and significantly reduced in the longitudinal direction. As the thermal weight properties of A power cable was definitely varied, we are able to guess the problem of manufacture. If the cable was defect by the manufacture, the victims would be able to claim for damage in the PL system.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.5
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• pp.800-805
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• 2017

The accelerated thermal ageing of CSPE (chlorosulfonated polyethylene) was carried out for 16.82, 50.45, and 84.09 days at $110^{\circ}C$, equivalent to 20, 60, and 100 years of ageing at $50^{\circ}C$ in nuclear power plants, respectively. As the accelerated thermally aged years increase, the insulation resistance and resistivity of the CSPE decrease, and the capacitance, relative permittivity and dissipation factor of those increase at the measured frequency, respectively. As the accelerated thermally aged years and the measured frequency increase, the phase degree of response voltage vs excitation voltage of the CSPE increase but the phase degree of response current vs excitation voltage decrease, respectively. As the accelerated thermally aged years increase, the apparent density, glass transition temperature and the melting temperature of the CSPE increase but the percent elongation and % crystallinity decrease, respectively. The differential temperatures of those are $0.013-0.037^{\circ}C$ and, $0.034-0.061^{\circ}C$ after the AC and DC voltages are applied to CSPE-0y and CSPE-20y, respectively; the differential temperatures of those are $0.011-0.038^{\circ}C$ and $0.002-0.028^{\circ}C$ after the AC and DC voltages are applied to CSPE-60y and CSPE-100y, respectively. The variations in temperature for the AC voltage are higher than those for the DC voltage when an AC voltage is applied to CSPE. It is found that the dielectric loss owing to the dissipation factor($tan{\delta}$) is related to the electric dipole conduction current. It is ascertained that the ionic (electron or hole) leakage current is increased by the partial separation of the branch chain of CSPE polymer as a result of thermal stress due to accelerated thermal ageing.

• Progress in Superconductivity
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• v.8 no.2
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• pp.143-151
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• 2007

Accurate measurements of the microwave surface resistance (Rs) of high temperature superconductor (HTS) films are important with regard to applications of HTS materials for wireless communications. As the surface resistance values of HTS films are usually extracted from the measured unloaded quality factor ($Q_0$) of resonators made of HTS films, it is essential to measure the resonator $Q_0$ with accuracy. The $TE_{011}\;mode\;Q_0$ of sapphire resonators with the endplates made of $YBa_2Cu_3O_{7-{\delta}}$(YBCO) film on $LaAlO_3$ is measured by using the S-parameter circle-fit method at a frequency of about 19.6 GHz and temperatures of 30 K to 90 K, which is compared with the measured values by using the Lorentzian-fit method. Good agreements are found between the two sets of $Q_0$ values measured by using the two different methods whether the resonator is used in a weak-coupling scheme or a strong-coupling scheme, showing reliability of both methods fur measuring the resonator $Q_0$ accurately. The $Q_0$ of sapphire resonators with a gap between the top plate and the rest of the resonator is also discussed.

• Progress in Superconductivity and Cryogenics
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• v.16 no.4
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• pp.66-70
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• 2014

The superconducting fault current limiter (SFCL) is an electrical power system device that detects the fault current automatically and limits the magnitude of the current below a certain safety level. The SFCL module does not have any electrical resistance below the critical temperature, which facilitates lossless power transmission in the electric power system. Once given the fault current, however, the superconducting conductor exhibits extremely high electrical resistance, and the magnitude of the current is accordingly limited to a low value. Therefore, SFCL should be maintained at a temperature below the critical temperature, which justifies the cryogenic cooling system as a mandatory component. This report is a study which reported on the cooling system for the 154 kV-class hybrid SFCL owned by Korea Electric Power Corporation (KEPCO). Using the cryocooler, the temperature of liquid nitrogen (LN2) was lowered to 71 K. The cryostat was pressurized to 5 bars to improve the dielectric strength of nitrogen and suppress nitrogen bubble foaming during operation of SFCL. The SFCL module was immersed in the liquid nitrogen of the cryostat to maintain the superconducting state. The performance test results of the key components such as cryocooler, LN2 circulation pump, cold box, and pressure builder are shown in this paper.

• Ceramist
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• v.21 no.2
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• pp.4-18
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• 2018

Lastly, neuromorphic computing chip has been extensively studied as the technology that directly mimics efficient calculation algorithm of human brain, enabling a next-generation intelligent hardware system with high speed and low power consumption. Three-terminal based synaptic transistor has relatively low integration density compared to the two-terminal type memristor, while its power consumption can be realized as being so low and its spike plasticity from synapse can be reliably implemented. Also, the strong electrical interaction between two or more synaptic spikes offers the advantage of more precise control of synaptic weights. In this review paper, the results of synaptic transistor mimicking synaptic behavior of the brain are classified according to the channel material, in order of silicon, organic semiconductor, oxide semiconductor, 1D CNT(carbon nanotube) and 2D van der Waals atomic layer present. At the same time, key technologies related to dielectrics and electrolytes introduced to express hysteresis and plasticity are discussed. In addition, we compared the essential electrical characteristics (EPSC, IPSC, PPF, STM, LTM, and STDP) required to implement synaptic transistors in common and the power consumption required for unit synapse operation. Generally, synaptic devices should be integrated with other peripheral circuits such as neurons. Demonstration of this neuromorphic system level needs the linearity of synapse resistance change, the symmetry between potentiation and depression, and multi-level resistance states. Finally, in order to be used as a practical neuromorphic applications, the long-term stability and reliability of the synapse device have to be essentially secured through the retention and the endurance cycling test related to the long-term memory characteristics.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.04a
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• pp.35-43
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• 2001

Flip chip assembly on organic substrates using ACAs have received much attentions due to many advantages such as easier processing, good electrical performance, lower cost, and low temperature processing compatible with organic substrates. ACAs are generally composed of epoxy polymer resin and small amount of conductive fillers (less than 10 wt.%). As a result, ACAs have almost the same CTE values as an epoxy material itself which are higher than conventional underfill materials which contains lots of fillers. Therefore, it is necessary to lower the CTE value of ACAs to obtain more reliable flip chip assembly on organic substrates using ACAs. To modify the ACA composite materials with some amount of conductive fillers, non-conductive fillers were incorporated into ACAs. In this paper, we investigated the effect of fillers on the thermo-mechanical properties of modified ACA composite materials and the reliability of flip chip assembly on organic substrates using modified ACA composite materials. Contact resistance changes were measured during reliability tests such as thermal cycling, high humidity and temperature, and high temperature at dry condition. It was observed that reliability results were significantly affected by CTEs of ACA materials especially at the thermal cycling test. Results showed that flip chip assembly using modified ACA composites with lower CTEs and higher modulus by loading non-conducting fillers exhibited better contact resistance behavior than conventional ACAs without non-conducting fillers. Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of $SiO_2filler$ to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. Our results indicate that the electrical performance of ACF combined with electroless Wi/Au bump interconnection is comparable to that of solder joint.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1591-1597
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• 2003

In this paper, Active Resonator Oscillator using active inductor and active capacitor with HEMTs(agilent ATF­34143) is designed and fabricated. Active inductor with ­25$\Omega$ and 2.4nH in 5.5GHz frequency band and Active capacitor with ­14$\Omega$ and 0.35pF is designed. Active Resonator Oscillator for LO in ISM band(5.8GHz) is designed with active inductor and active capacitor. Active Resonator Oscillator has been simulated by Agilent ADS 2002C. Active Resonator oscillator implemented on the substrate which has the relative dielectric constant of 3.38, the height of 0.508mm, and metal thickness of 0.018mm. This Active Resonator Oscillator shows the oscillation frequency of 5.68GHz with the output power of ­3.6㏈m and phase noise of ­81㏈c/Hz at the offset frequency of 100KHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.3-4
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• 2006

In this paper, a nickel silicide technology with post-silicidation annealing effect for thin film SOI devices is investigated in detail. Although lower resistivity Ni silicide can be easily obtained at low forming temperature, poor thermal stability and changing of characteristic are serious problems during the post silicidation annealing like ILD (Inter Layer Dielectric) deposition or metallization. So these effects are observed as deposited Ni thickness differently on As doped SOI (Si film 30nm). Especially, the sheet resistance of Ni thickness deposited 20nm was lower than 30nm before the post silicidation annealing. But after the post silicidation annealing, the sheet resistance was changed. Therefore, in thin film SOI MOSFETs or Ni-FUSI technology that the Si film is less than 50nm, it is important to decide the thickness of deposited Ni in order to avoid forming high resistivity silicide.

• Journal of IKEEE
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• v.22 no.1
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• pp.180-184
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• 2018

Gallium oxide ($Ga_2O_3$) and silicon carbide (SiC) are the material with the wide band gap ($Ga_2O_3-4.8{\sim}4.9eV$, SiC-3.3 eV). These electronic properties allow high blocking voltage. In this work, we investigated the characteristic of $Ga_2O_3$ and 4H-SiC vertical depletion-mode metal-oxide-semiconductor field-effect transistors. We demonstrated that the blocking voltage and on-resistance of vertical DMOSFET is dependent with structure. The structure of $Ga_2O_3$ and 4H-SiC vertical DMOSFET was designed by using a 2-dimensional device simulation (ATLAS, Silvaco Inc.). As a result, 4H-SiC and $Ga_2O_3$ vertical DMOSFET have similar blocking voltage ($Ga_2O_3-1380V$, SiC-1420 V) and then when gate voltage is low, $Ga_2O_3-DMOSFET$ has lower on-resistance than 4H-SiC-DMOSFET, however, when gate voltage is high, 4H-SiC-DMOSFET has lower on-resistance than $Ga_2O_3-DMOSFET$. Therefore, we concluded that the material of power device should be considered by the gate voltage.