• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.04a
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• pp.35-40
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• 1997

The present study considers the analysis and control of the bonding process for a LOC DIe Bonder. A mathematical model for describing the bonding process is developed and proved by experiments. A feedback scheme is also applied for system in order to ensure the robustness of the bonding force control. The theoretical and experimental results are proved useful for the design and control of the LOC Die Bonder.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.171-176
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• 2021

Die-to-wafer (D2W) hybrid bonding in the multilayer semiconductor manufacturing process is one of wafer direct bonding, and various studies are being conducted around the world. A noteworthy point in the current die-to-wafer process is that a lot of voids occur on the bonding surface of the die during bonding. In this study, as a suggested method for removing voids generated during the D2W hybrid bonding process, a flexible mechanism for implementing convex for die bonding to be applied to the bond head is proposed. In addition, modeling of flexible mechanisms, analysis/design/control/evaluation of static/dynamics properties are performed. The proposed system was controlled by capacitive sensor (lion precision, CPL 290), piezo actuator (P-888,91), and dSpace. This flexure mechanism implemented a working range of 200 ㎛, resolution(3σ) of 7.276nm, Inposition(3σ) of 3.503nm, settling time(2%) of 500.133ms by applying a reverse bridge type mechanism and leaf spring guide, and at the same time realized a maximum step difference of 6 ㎛ between die edge and center. The results of this study are applied to the D2W hybrid bonding process and are expected to bring about an effect of increasing semiconductor yield through void removal. In addition, it is expected that it can be utilized as a system that meets the convex variable amount required for each device by adjusting the elongation amount of the piezo actuator coupled to the flexible mechanism in a precise unit.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.303-304
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• 2005

In this paper, we report a fluxless eutectic die bonding process which uses 80Au-20Sn eutectic alloy. The chip LEDs are picked and placed on silicon substrate wafers. The bonding process temperatures and force are $305\sim345^{\circ}C$ and 10$\sim$100gf, respectively. The bonding process was performed on graphite heater with nitrogen atmosphere. The quality of bonding are evaluated by shear test and thermal resistance. Results of fluxless eutectic die bonding show that shear strength is Max. 3.85kgf at 345$^{\circ}C$ /100gf and thermal resistance of junction to die bonding is Min. 3.09K/W at 325$^{\circ}C$/100gf.

• Journal of the Korean Society of Industry Convergence
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• v.15 no.1
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• pp.37-42
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• 2012

Trends in semiconductor equipment industry are to reduce the cost of producing semiconductor, semiconductor process development, facility development, and the minimum investment in terms of cost and quality. Semiconductor equipments are being considered to review and development is proceeding at the same time. In the first part of the semiconductor assembly process, in which the importance of die bonding process is emerging, a wide leadframe type die bonding machine is demanded for productivity. Die bonding machine was designed through experiments and by trial and error. It costs a lot of time and financial burden. The purpose of this study is to solve these problems by using the CAE tool 3G. By using finite element method, thermal analysis of die bonding machine to the various widths leadframe die bonder machine rail is performed for design.

• Journal of information and communication convergence engineering
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• v.13 no.3
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• pp.172-179
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• 2015

Face-to-face (F2F) bonding in three-dimensional integrated circuits (3D ICs), compared with other bonding styles, is closer to commercialization because of its benefits in terms of density, yield, and cost. However, despite the benefits that F2F bonding expect to provide, it's physical nature has not been studied thoroughly. In this study, we, for the first time, extract cross-die (inter-die) parasitic elements from F2F bonds on the full-chip scale and compare them with the intra-die elements. This allows us to demonstrate the significant impact of field sharing across dies in F2F bonding on full-chip noise and critical path delay values. The baseline method used is the die-by-die method, where the parasitic elements of individual dies are extracted separately and the cross-die parasitic elements are ignored. Compared with this inaccurate method, which was the only method available until now, our first-of-its-kind holistic method corrects the delay error by 25.48% and the noise error by 175%.

• 제어로봇시스템학회:학술대회논문집
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• 1988.10a
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• pp.353-359
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• 1988

In this paper, the design and implementation of a multi-processor based die bonder machine for the semiconductor will be described. This is a final research results carried out for two years from June, 1986 to July, 1988. The mechanical system consists of three subsystems such as bonding head module, wafer feeding module, and lead frame feeding module. The overall control system consists of the following three subsystems each of which employs a 16 bit microprocessor MC 68000 : (i) supervisory control system, (ii) visual recognition / inspection system and (iii) the display system. Specifically, the supervisory control system supervises the whole sequence of die bonder machine, performs a self-diagnostics while it controls the bonding head module according to the prespecified bonding cycle. The vision system recognizes the die to inspect the die quality and deviation / orientation of a die with respect to a reference position, while it controls the wafer feeding module. Finally, the display system performs a character display, image display ans various error messages to communicate with operator. Lead frame feeding module is controlled by this subsystem. It is reported that the proposed control system were applied to an engineering sample and tested in real-time, and the results are sucessful as an engineering sample phase.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.10
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• pp.4378-4384
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• 2012

In LED chip packaging, die bonding is a very important process which fixes the LED chip on the lead frame to provide enough strength for the next process. This paper focuses on the process optimization of a LED die bonding, which attaches small zener diode chip on PLCC LED package frame, using response surface analysis. Design of experiment (DOE) of 5 factors, 3 levels and 5 responses are considered, and the results are investigated. As the results, optimal conditions those satisfy all response objects can be derived.

• Archives of Metallurgy and Materials
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• v.64 no.2
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• pp.507-512
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• 2019

Ag and Cu powders were mechanically alloyed using high-energy planetary milling to evaluate the sinter-bonding characteristics of a die-attach paste containing particles of these two representative conductive metals mixed at atomic scale. This resulted in the formation of completely alloyed Ag-40Cu particles of 9.5 ㎛ average size after 3 h. The alloyed particles exhibited antioxidation properties during heating to 225℃ in air; the combination of high pressure and long bonding time at 225℃ enhanced the shear strength of the chip bonded using the particles. Consequently, the chips sinter-bonded at 225℃ and 10 MPa for 10 min exhibited a sufficient strength of 15.3 MPa. However, an increase in bonding temperature to 250℃ was detrimental to the strength, due to excessive oxidation of the alloyed particles. The mechanically alloyed phase in the particle began to decompose into nanoscale Ag and Cu phases above a bonding temperature of 225℃ during heating.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.653-654
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• 2010

• Korean Journal of Materials Research
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• v.34 no.3
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• pp.170-174
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• 2024

In this study, we report the microstructural evolution and shear strength of an Sn-Sb alloy, used for die attach process as a solder layer of backside metal (BSM). The Sb content in the binary system was less than 1 at%. A chip with the Sn-Sb BSM was attached to a Ag plated Cu lead frame. The microstructure evolution was investigated after die bonding at 330 ℃, die bonding and isothermal heat treatment at 330 ℃ for 5 min and wire bonding at 260 ℃, respectively. At the interface between the chip and lead frame, Ni₃Sn₄ and Ag₃Sn intermetallic compounds (IMCs) layers and pure Sn regions were confirmed after die bonding. When the isothermal heat treatment is conducted, pure Sn regions disappear at the interface because the Sn is consumed to form Ni₃Sn₄ and Ag₃Sn IMCs. After the wire bonding process, the interface is composed of Ni₃Sn₄, Ag₃Sn and (Ag,Cu)₃Sn IMCs. The Sn-Sb BSM had a high maximum shear strength of 78.2 MPa, which is higher than the required specification of 6.2 MPa. In addition, it showed good wetting flow.