• Journal of Information Technology Services
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• v.11 no.4
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• pp.171-180
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• 2012

Since software and hardware integration has became a strategic tool for companies to innovate their products, an information system that can comprehensively manage software and hardware integrated product development is critical for the current product development. This paper proposed a product data model that can support modules of related software and hardware parts in Product Data Management(PDM) integrated with Software Configuration Management(SCM). The model allows engineers to define software and hardware product structure independently, and support the integration module that can summon related software and hardware parts to build a comprehensive module for collaboration. Through the integration module, engineers can identify and examine the effectiveness of their design alternatives to other related parts form different disciplines. The product data model was implemented as a prototype PDM system and tested with an example robotics product.

• Journal of Korea Multimedia Society
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• v.10 no.11
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• pp.1446-1459
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• 2007

This paper presents and analyzes a novel technique that makes it possible to improve the performance of low-end embedded systems through SoC(System-on-a-Chip) platform supporting dynamic cooperation between hardware and software modules. Traditional embedded systems with limited hardware resources have the poor capability of carrying out multi-tasking jobs including complex calculations. The proposed SoC platform, which provides dynamic cooperation between hardware and software modules, decomposes a single specific system into tasks for given system requirements. Additionally, we also propose a technique for efficient communication and synchronization between hardware and software tasks in cooperation with each other. Several experiments are conducted to illustrate the application and efficiency of the proposed SoC platform. They show that the proposed SoC platform outperforms the traditional embedded system, where only software tasks run, as the number of memory access is increased and the system become more complex.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.9A
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• pp.1368-1376
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• 2000

This paper describes the codesign method for IS-95 based CDMA(Code Division Multiple Access). By codesign we mean to design hardware and software simultaneously. Codesign lead to reduction in design time, cost and power consumption. When we partition a system into hardware and software, some modules with longer processing time and larger power consumption are implemented using hardware and the remaining part is implemented using software. In proposed design, we design the synchronous accumulator of CDMA searcher in hardware and the other part in software, The hardware part is designed using VHDL, while software part is designed using GC(Generic C). We simulated and verified the system using COSSAP in SYNOPSYSTM. Experimentation showed the maximum 48.5% speed reduction compared with the design using software only.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.9 no.2
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• pp.237-242
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• 2016

To build effective u-healthcare system based-on smart-cloth, design of hardware and software modules for suitable smart-cloth is needed. And a gateway smart-phone program for sensing signal's collecting and processing is needed to send sensing bio-signal from smart-cloth to sever. To do this, it is an important to design and describe modules well for having no difficult problems when implementing later. Also, if medical team do not monitor bio-signals sending from smart-phone frequently and these signals' change values which diagnose automatically due to building expert system based on rules/facts is informed for users, it will be an useful u-healthcare system. Therefore in this paper, by presenting design method of u-healthcare system hardware and software modules based on smart-cloth which prepared these functions, this design method is showed for applying a common use u-healthcare system's production usefully.

• Journal of Computational Design and Engineering
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• v.1 no.4
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• pp.243-255
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• 2014

The present study describes the development of control hardware and software for a mobile welding robot. This robot is able to move and perform welding tasks in a double hull structure. The control hardware consists of a main controller and a welding machine controller. Control software consists of four layers. Each layer consists of modules. Suitable combinations of modules enable the control software to perform the required tasks. Control software is developed using C programming under QNX operating system. For the modularizing architecture of control software, we designed control software with four layers: Task Manager, Task Planner, Actions for Task, and Task Executer. The embedded controller and control software was applied to the mobile welding robot for successful execution of the required tasks. For evaluate this imbedded controller and control software, the field tests are conducted, it is confirmed that the developed imbedded controller of mobile welding robot for shipyard is well designed and implemented.

• 제어로봇시스템학회:학술대회논문집
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• 1993.10a
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• pp.308-313
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• 1993

In this paper, the navigation computer design of RPV(remotely piloted vehicle) using GPS is investigated, and its hardware and software structures are described. The proposed hardware adopts the common PC configuration by using 5016A micro PC card and software is divided into several modules such as navigation module, guidance module and control module, etc. The performance of the navigation computer is verified through PILS(process in the loop simulation).

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.9
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• pp.691-698
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• 2006

TCP/IP Offload Engine (TOE) is a technology that processes TCP/IP on a network adapter instead of a host CPU to reduce protocol processing overhead from the host CPU. There have been some approaches to implementing TOE: software TOE based on an embedded processor; hardware TOE based on ASIC implementation; and hybrid TOE in which software and hardware functions are combined. In this paper, we designed software modules and hardware modules for a hybrid TOE on an FPGA that had two processor cores. Software modules are based on the embedded Linux. Hardware modules are for data transmission (TX) and reception (RX). One core controls the TX path and the other controls the RX path of the Linux. This TX/RX path separation mechanism can reduce task switching overheads between processes and overcome poor performance of single embedded processor. Hardware modules deal with creating headers for outgoing packets, processing headers of incoming packets, and fetching or storing data from or to the host memory by DMA. These can make it possible to improve the performance of data transmission and reception. We proved performance of the TOE with separated transmission and reception paths by performing experiments with a TOE network adapter that was equipped with the FPGA having processor cores.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.17 no.32
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• pp.81-94
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• 1994

The objective of this case study is to describe ins and outs of a production and information management system developed for footwear industry (based on MRP system). First, basic structure of the total system, configuration of sub-system modules, specification and configuration of software/hardware used in this system are presented. Second, design of the total system flow, configuration of code system, file description used in this system are explained. Third, function of software modules and principal algorithms and basic data structuring technigues are discussed. Finally, inplementation plan and output reports are presented.

• Journal of KIISE:Computing Practices and Letters
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• v.6 no.4
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• pp.448-456
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• 2000

As the system complexity increases, it is important to develop high-level verification techniques for fast and efficient design verifications. In this research, fast verification techniques for hardware and software co-design systems have been developed by using logic emulation and algorithm-level simulation. For faster and superior functional verification, we partition the system being designed into hardware and software parts, and implement the divided parts by using interface modules. We also propose several hardware design techniques for efficient hardware emulation. Experimental results, obtained by using a Reed-Solomon decoder system, show that our new verification methodology is more than 12,000 times faster than a commercial simulation tool for the modified Euclid's algorithm block and the overall verification time is reduced by more than 50%.

• Journal of Advanced Navigation Technology
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• v.17 no.1
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• pp.69-79
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• 2013

In this paper, DCT(Discrete Cosine Transform) and CAVLC(Context Adaptive Variable Length Coding) are co-designed as hardware IP with software operation of the other modules in H.264/AVC codec. In order to increase the operation speed, a new method using SHIFT table is proposed. As a result, enhancement of about 16(%) in the operation speed is obtained. Designed Hardware IPs are downloaded into Virtex-4 FX60 FPGA in the ML-410 development board and H.264/AVC encoding is performed with Microblaze CPU implemented in FPGA. Software modules are developed from JM13.2 to make C code. In order to verify the designed Hardware IPs, Modelsim program is used for functional simulation. As a result that all Hardware IPs and software modules are downloaded into the FPGA, improvement of processing speed about multiples of 16 in case of DCT hardware IP and multiples of 10 in case of CAVLC compared with software-only processing. Although this paper deals with co-design of H/W and S/W for H.264, it can be utilized for the other embedded system design.