• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.6
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• pp.605-611
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• 2019

3D Vision system has many applications recently but popularization have many problems that need to be overcome. Volumetric display may process a amount of visual data and design the high efficient vision system for display. In case of stereo system for volumetric display, disparity vectors from the stereoscopic sequences and residual images with the reference images has been transmitted, and the reconstructed stereoscopic sequences have been displayed at the receiver. So central issue for the design of efficient volumetric vision system lies in selecting an appropriate stereo matching and robust vision system. In this paper, we propose high efficient vision system with the reduction of rectification error which can perform the 3D data extraction efficiently with low computational complexity. In experimental results with proposed vision system, the proposed method can perform the 3D data extraction efficiently with reducing rectification error and low computational complexity.

• KIISE Transactions on Computing Practices
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• v.20 no.10
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• pp.561-566
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• 2014

There are growing demands for improving the patient safety and the effectiveness of medical services through device connectivity and interoperability. However, integration through networking might greatly increase the complexity of the system if it is not properly designed, jeopardizing patient safety. In this paper, we codify safe medical device interaction patterns, and exploit them for the low complexity design and safety analysis of networked supervisory medical systems. We implement the proposed approach as a plug-in of Architecture Analysis and Description Language (AADL). Our implementation enables the modeling and safety analysis of medical devices and their interactions before actual development.

• Journal of Advanced Navigation Technology
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• v.19 no.1
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• pp.53-59
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• 2015

We consider the problems that consist of designing time, establishment cost, delay time and reliability in designing a mesh network when given link costs and traffic requirements between nodes. Designing time, establishment cost and delay time are less, reliability is higher in designing a mesh network. One of the problems designing time is solved by mesh network topology optimization and routing (MENTOR) algorithm that Aaron Kershenbaum propose, but the others remain. In this paper we propose a new mesh network design algorithm with small computational complexity that the others are solved. The result of the proposed algorithm is better than MENTOR's in total establishment cost, delay time and reliability.

• Transactions of the Korean Society of Automotive Engineers
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• v.18 no.2
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• pp.39-47
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• 2010

As vehicles become intelligent for convenience and safety of drivers, in-vehicle networking (IVN) systems are essential components of intelligent vehicles. Recently, the chassis networking system which require increased network capacity and real-time capability is being developed to expand the application area of IVN systems. Also, FlexRay has been developed for the chassis networking system. However, FlexRay needs a complex scheduling method of static segment, which is a barrier for implementing the chassis networking system. Especially, if we want to migrate from CAN network to FlexRay network using CAN message database that was well constructed for the chassis networking system by automotive vendors, a novel scheduling method is necessary to be able to reduce design complexity. This paper presents a node-based scheduling method for FlexRay network system. And, in order to demonstrate the method's feasibility, its performance is evaluated through an experimental testbed.

• Journal of KIISE:Information Networking
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• v.29 no.6
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• pp.625-634
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• 2002

Cryptography is the methods of making and using secret writing that is necessary to keep messages private between two parties. Cryptography is compute-intensive algorithm and needs cpu resource excessively. To solve these problems, there exists hardware approach that implements cryptographic algorithm with hardware chip. In this paper, we presents the design and implementation of cryptographic hardware and compares its performance with software cryptographic algorithms. The experimental result shows that the hardware approach causes high I/O overheads when it transmits data between cryptographic board and host cpu. Hence, low complexity cryptographic algorithms such as DES does not improve the performance. But high complexity cryptographic algorithms such as Triple DES improve the performance with a high rate, roughly from two times to Sour times.

• Journal of Aerospace System Engineering
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• v.8 no.2
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• pp.21-26
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• 2014

The aircraft manufacturers are constantly driving to reduce manufacturing lead times and cost at the same time as the product complexity increases and technology continues to change. Integrated Modular Avionics (IMA) is a solution that allows the aviation industry to manage their avionics complexity. IMA defines an integrated system architecture that preserves the fault containment and 'separation of concerns' properties of the federated architectures. In software side, the air transport industry has developed ARINC 653 specification as a standardized Real Time Operating System (RTOS) interface definition for IMA. It allows hosting multiple applications of different software levels on the same hardware in the context of IMA architecture. This paper describes a study that provided the avionics software design for separation of fault and backup of core function to reduce workload of pilot with cost efficiency.

• Journal of Computational Design and Engineering
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• v.3 no.2
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• pp.151-160
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• 2016

Cutter-workpiece engagement (CWE) is the instantaneous contact geometry between the cutter and the in-process workpiece during machining. It plays an important role in machining process simulation and directly affects the calculation of the predicted cutting forces and torques. The difficulty and challenge of CWE determination come from the complexity due to the changing geometry of in-process workpiece and the curved tool path of cutter movement, especially for multi-axis milling. This paper presents a new method to determine the CWE for general milling processes. To fulfill the requirement of generality, which means for any cutter type, any in-process workpiece shape, and any tool path even with self-intersections, all the associated geometries are to be modeled as triangle meshes. The involved triangle-to-triangle intersection calculations are carried out by an effective method in order to realize the multiple subtraction Boolean operations between the tool and the workpiece mesh models and to determine the CWE. The presented method has been validated by a series of case studies of increasing machining complexity to demonstrate its applicability to general milling processes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.6C
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• pp.577-584
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• 2005

Optimal methods for designing multiplierless minimal complexity FIR filters with cascaded prefilter-equalizer structures are proposed for narrowband communication systems. Assuming that an FIR filter consists of a cyclotomic polynomial(CP) prefilter and an interpolated second order polynomial(ISOP) equalizer, in the proposed method the prefilter and equalizer are simultaneously designed using mixed integer linear programming(MILP). The resulting filter is a cascaded filter with minimal complexity. Design examples demonstrate that the proposed methods produce a more computationally efficient cascaded prefilter-equalizer than other existing filters.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.143-152
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• 2005

Optimal methods for designing multiplierless IIR filters with cascaded prefilter-equalizer structures are proposed for narrowband applications. Assuming that an U filter consists of a cyclotomic Polynomial (CP) prefilter and an all-Pole equalizer based on interpolated first order polynomial (IFOP), in the proposed method the prefilter and equalizer are simultaneously designed using mixed integer linear programming (MILP). The resulting filter is a cascaded filter with minimal complexity. In addition, MtP tries to minimize both computational complexity and phase response non-linearity. Design examples demonstrate that the proposed methods produce a more efficient cascaded prefilter-equalizer than existing methods.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.9
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• pp.39-45
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• 2004

A design method is proposed for the sequence detection with fixed decision delay with less hardware complexity using the concept of the Voronoi diagram and its dual, the Delaunay tessellation. This detector design is based on the Fixed Delay Tree Search (FDTS) detection. The FDTS is a computationally efficient sequence detection algerian and has been shown to achieve near-optimal performance in the severe Intersymbol Interference (ISI) channels when combined with decision feedback equalization and the appropriate channel coding. In this approach, utilizing the information contained in the Voronoi diagram or equivalently the Delaunay tessellation, the relative location of the detector input sequence in the multi-dimensional Euclidean space is found without any computational redundancy, which leads to a reduced complexity implementation of the detector.