• Title/Summary/Keyword: Delay Tool

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Development of a methodology for analysing and quantifying the impact of delay factors affecting construction projects

  • Shebob, Abdulhamid;Dawood, Nashwan;Shah, Raj K.
    • Journal of Construction Engineering and Project Management
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    • v.2 no.3
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    • pp.17-29
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    • 2012
  • Delays are one of the biggest problems facing by the construction industry and they have significant financial and social impact in construction projects. The paper presents a framework of Delay Analysis System (DAS) with the aim of analysing the impact of delay factors in Libyan construction projects. The system has designed by integrating the possible delay factors, critical activities of a project using@risk simulator. A case study of building project was demonstrated to identify the impact of delays and the sensitivity of delay factor. The case study result showed that the project might be delayed by 97 to 103 days in comparison to the planned duration. The developed DAS is a tool for analysing and identify the impacts of delay factors and assist to construction manager to take necessary measure in reducing the delay impact. The paper provides a methodology for analysing the possible delay impact in a construction project and informing to construction manager in advance of the possible delay factors.

Applicability of Appropriateness Evaluation Protocol and Delay Tool (적절성 평가지침과 이유목록의 적용 가능성 평가)

  • Shin, Youngsoo;Kim, Yong-Ik;Kim, Chang-Yup;Kim, Yoon;Kim, Eun Gyung;Song, Yun Mi;Lee, Young Seong
    • Quality Improvement in Health Care
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    • v.1 no.1
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    • pp.96-108
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    • 1994
  • Background: An appropriate use of hospital beds can improve productivity of hospital significantly. The authors' previous study revealed that approximately one third of Korean hospital bed days and one sixth of admissions were inappropriately used, when it was measured by Appropriateness Evaluation Protocol(AEP) and Delay Tool modified into Korean situation by the authors. This study aims to evaluate applicability of the instruments in a new hospital. More specifically the study aims to measure appropriateness of the instruments used by newly trained nurse reviewers at a new hospital setting. Methods: In order to evaluate applicability of these instruments, agreement rates of the scores recorded by newly trained nurse reviewers with by skilled nurse reviewer and also compared with the scores recorded by physician's implicit decision were assessed. Agreement rates were derived from concurrent application of AEP and Delay Tool to 52 admissions and 104 patient days from internal medicine, pediatrics, and general surgery of one university hospital. Overall agreement rate, specific nonacute agreement rate, and kappa statistics were used to indicate level of agreement. Results: Overall agreement rates on appropriateness between newly trained nurse reviewers and skilled nurse reviewer were 100% in admission and 98% in bed days. Overall agreement rates on reason for inappropriateness between newly trained nurse reviewers and skilled nurse reviewer were 96% in admission and 91% in bed days. Overall agreement rates between newly trained nurse reviewers and physician reviewer were 86% in admission and 87% in bed days. Conclusion: Results indicated that AEP and Delay Tool were applicable to a new hospital in detecting inappropriate utilization of beds and reasoning of the inappropriateness. These instruments could contribute to enhance efficiency of hospital use, through continuous monitoring of level of inappropriate hospital use at national or individual hospital level.

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Development of a Measurement Data Algorithm of Deep Space Network for Korea Pathfinder Lunar Orbiter mission (달 탐사 시험용 궤도선을 위한 심우주 추적망의 관측값 구현 알고리즘 개발)

  • Kim, Hyun-Jeong;Park, Sang-Young;Kim, Min-Sik;Kim, Youngkwang;Lee, Eunji
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.45 no.9
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    • pp.746-756
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    • 2017
  • An algorithm is developed to generate measurement data of deep space network for Korea Pathfinder Lunar Orbiter (KPLO) mission. The algorithm can provide corrected measurement data for the Orbit Determination (OD) module in deep space. This study describes how to generate the computed data such as range, Doppler, azimuth angle and elevation angle. The geometric data were obtained by General Mission Analysis Tool (GMAT) simulation and the corrected data were calculated with measurement models. Therefore, the result of total delay includes effects of tropospheric delay, ionospheric delay, charged particle delay, antenna offset delay, and tropospheric refraction delay. The computed measurement data were validated by comparison with the results from Orbit Determination ToolBoX (ODTBX).

Design of a Disturbance Observer Using a Second-Order System Plus Dead Time Modeling Technique (시간 지연을 갖는 2차 시스템 모델링 기법을 이용한 외란 관측기 설계)

  • Jeong, Goo-Jong;Son, Young-Ik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.1
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    • pp.187-192
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    • 2009
  • This paper presents a method for designing a robust controller that alleviates disturbance effects and compensates performance degradation owing to the time-delay. Disturbance observer(DOB) approach as a tool of robust control has been widely employed in industry. However, since the Pade approximation of time-delay makes the plant non-minimum phase, the classical DOB cannot be applied directly to the system with time-delay. By using a new DOB structure for non-minimum phase systems together with the Smith Predictor, we propose a new controller for reducing the both effects of disturbance and time-delay. Moreover, the closed-loop system can be made robust against uncertain time-delay with the help of a Pill controller tuning method that is based on a second-order plus dead time modeling technique.

Design of Disturbance Observer-Based Robust Controller for a Time-Delay System (시간 지연을 갖는 시스템에 대한 외란 관측기 기반 강인 제어기 설계)

  • Jeong, Goo-Jong;Son, Young-Ik;Jeong, Yu-Seok
    • Proceedings of the KIEE Conference
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    • 2008.04a
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    • pp.213-214
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    • 2008
  • This paper considers design of a robust controller that alleviates disturbance effects and compensates performance degradation of plants with time-delay. Disturbance observer(DOB) approach as a tool of robust control has been widely employed in industry. However, since the time-delay makes the plant non-minimum phase, classical DOB cannot be applied directly to the time-delay system. By using a new DOB structure for non-minimum phase systems together with the Smith Predictor, we propose a new control algorithm for reducing the effects of disturbance and time-delay of the system.

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Robust control of input time delay systems by observer design (관측기 설계에 의한 시간지연 시스템의 강인한 제어)

  • 김정원;이장명
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.239-242
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    • 1998
  • Most of time delay existing in industrial processes can be modeled as an input time-delay which causes a lot of difficulties. To implement a time-delay free control, loop transfer function is recovered through the direct state feedback. For the proper state feedback, and observer is designed based upon the factorization approach which is known as one of the most powerful tool for the design of various control systems. The design scheme is parctically applied for the control of a DC motro which suffers from input time-delay. Simulational results demonstrate that this new algorithm guarantess the stability of the time-delayed system, as well as performance improvement compared to the conventional PI control.

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VHDL modeling considering routing delay in antifuse-based FPGAs (안티퓨즈 FPGA의 배선지연시간을 고려한 VHDL 모델링)

  • 백영숙;조한진;박인학;김경수
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.5
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    • pp.180-187
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    • 1996
  • This paper describes a post-layout simulation method using VHDL and C for verifying the architecture of antifuse-based FPGAs and the dedicated CAD system. An antifuse-based FPGA consists of programming circuitry including decoding logic, logic modules, segmented tracks, antifuses and I/O pads. The VHDL model which includes all these elements is used for logic verification and programming verification of the implemented circuit by reconstructing the logic circuit from the bit-stream generated from layout tool. The implemented circuit comprises of logic modules and routing networks. Since the routing delay of the complex networks is comparable to the delay of the logic module in the FPGA, the accurate post-layout simulation is essential to the FPGA system. In this paper, the C program calculates the delay of the routing netowrks using SPICE, elmore or horowitz delay models and the results feedback to the VHDL simulation. Critical path anc be found from this post-layout simulation results.

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Delay Time Estimation of Recharge in the Hancheon Watershed, Jeju Island (제주도 한천유역의 함양 지체시간 산정)

  • Kim, Nam-Won;Na, Hanna;Chung, Il-Moon
    • Journal of Environmental Science International
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    • v.23 no.4
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    • pp.605-613
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    • 2014
  • In this work, the delay time for groundwater recharge was estimated by comparing simulated recharges by means of SWAT(Soil and Water Assessment Tool) model and WTF(Water Table Fluctuation) method. The delay time for groundwater recharge means that the time when the water from rainfall travelled through vadose zone just after getting out of soil zone bottom. As measuring this delay time is almost impossible, we used to compare the estimated values from modeling(SWAT) and analytic method(WTF). The test site is Hancheon watershed which has 8 groundwater measurement stations. The results show that the altitude has a linear relationship with the estimated delay time values. To validate these results, we conducted corelation analysis between transformed groundwater levels and observed ones. The results showed that computed groundwater levels have good corelation($R^2$=0.97, 0.87, respectively). The estimated delay time would be used for the groundwater behaviour characteristics in vadose zone. As recharge rates vary according to the height, the delay time is thought to be an import variable for the proper groundwater recharge estimation.

Predicting the Significance of On-Chip Inductance Issues Based on Inductance Screening Results (Interconnect Scaling에 따른 온칩 인터커넥 인덕턴스의 중요성 예측)

  • Kim, So-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.3
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    • pp.25-33
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    • 2011
  • As chip operating frequency increases, there is growing concern about on-chip interconnect inductance. This paper presents a two-step inductance screening tool to select interconnects with significant inductance effects in a VLSI design. Test chips designed in different CMOS technology nodes are examined. The inductance screening results show that 0.1% of the nets in a design have inductance problems with chips running at its operating frequency, supporting the necessity of a screening process instead of adding inductance model to all the nets in the design. The increase in resistance due to geometry scaling will strongly affect the significance of inductance on delay as technology and frequency scale. Since higher frequency worsens inductance problem and geometry scaling alleviates it, inductance screening tool can provide useful guidelines to circuit designers.

Selection of Optimal Sensor Locations for Thermal Error Model of Machine tools (공작기계 열오차 모델의 최적 센서위치 선정)

  • 안중용
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 1999.10a
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    • pp.345-350
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    • 1999
  • The effectiveness of software error compensation for thermally induced machine tool errors relies on the prediction accuracy of the pre-established thermal error models. The selection of optimal sensor locations is the most important in establishing these empirical models. In this paper, a methodology for the selection of optimal sensor locations is proposed to establish a robust linear model which is not subjected to collinearity. Correlation coefficient and time delay are used as thermal parameters for optimal sensor location. Firstly, thermal deformation and temperatures are measured with machine tools being excited by sinusoidal heat input. And then, after correlation coefficient and time delays are calculated from the measured data, the optimal sensor location is selected through hard c-means clustering and sequential selection method. The validity of the proposed methodology is verified through the estimation of thermal expansion along Z-axis by spindle rotation.

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