• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2003.10a
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• pp.381-385
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• 2003

This paper presents the fabrication possibility of the micro actuator which uses a micro-thermal bubble, generated by a micro-heater under pulse heating. The micro-actuator is consist of three plate. The lower plate includes the channel and chamber are fabricated on high processability silicon wafer by the DRIE(Deep Reactive ion Etching) process. The middle plate includes the chamber and diaphragm, and the upper plate is the micro-heater. The micro-heater designed non-uniform width and results in periodic generation of stable single bubbles in D.I water. The single bubble appears precisely on the narrow part of the micro-heater and control is recorded.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1890-1892
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• 2001

This paper described on the fabrication of microstructures by DRIE(Deep Reactive Ion Etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -750 mm Hg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing(1000$^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as a accurate thickness control and a good flatness.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1037-1040
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• 2003

본 논문에서는 microcolumn 을 위한 초소형 전자빔 deflector 의 제작방법과 microcolumn array 에서 deflector 의 외부 패드를 최소화 할 수 있는 새로운 배선방법을 기술하였다. 배선의 통로 및 절연체 역할을 하는 Pyrex glass 의 양쪽에 각각 실리콘 웨이퍼의 양극접합 및 deep reactive ion etching(DRIE)과 금속 전기 도금을 이용하여 다층배선을 하였다. 이 배선방법을 이용하면 microcolumn array 가 수백개가 되더라도 deflector 의 외부 패드는 항상 8개를 유지할 수 있다.

• Journal of the Korean Society for Precision Engineering
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• v.23 no.4 s.181
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• pp.162-167
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• 2006

Hot embossing lithography(HEL) has the production advantage of comparatively few process step, simple operation, a relatively low cost for embossing tools(Si), and high replication accuracy for small features. In this paper, we considered the nano-molding characteristic according to molding parameters(temperature, pressure, times, etc) and induced a optimal molding condition using HEL. High precision nano-patter master with various shapes were designed and manufactured using the DRIE(Deep Reactive ion Etching), LPCVD(Low Pressure Chemical Vapor Deposition) and thermal oxidation process, and we investigated the molding characteristic of DVD and Blu-ray nickel stamp. We induced flow behaviors of polymer, rheology by shapes and sizes of the pattern through various molding experiments. Finally, with achieving nano-structure molding with high aspect ratio, we will secure a basic technology about the molding of large-area nano-pattern media.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2004.10a
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• pp.463-467
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• 2004

This paper presents the fabrication possibility of the micro actuator which uses a micro-thermal bubble, generated b micro-heater under pulse heating. The valve-less micropump using the diffuser/nozzle is consists of the lower plate, he middle plate, the upper plate. The lower plate includes the channel and chamber are fabricated on high processability silicon wafer by the DRIE(Deep Reactive Ion Etching) process. The middle plate includes the chamber and diaphragm d the upper plate is the micro-heater. The Micropump is fabricated by bonding process of the three layer. This paper resented the possibility of the PCR chip operation by the fabricated micropump.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2009.05a
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• pp.239-241
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• 2009

DRIE(Deep Ion Reactive Etching) 공정은 실리콘 웨이퍼를 식각하는 기술로서 Si wafer 비아 홀 제조에 주로 사용되고 있다. 즉, DRIE 공정은 식각 및 보호층 증착을 반복함으로써 직진성 식각을 가능하게 하는 공정이다. 또한, 3차원 적층 실장에서 Si wafer 비아 홀에 결함없이 효과적으로 구리 충진을 하기 위해서는 직각형 via보다 경사벽을 가진 via가 형상적으로 유리하다. 본 연구에서는 3차원 적층을 위한 Si wafer 비아 홀의 결함 없는 효과적인 구리 충진을 위해, DRIE 공정을 이용하여 기존의 경사벽을 가지는 via 흘 형성 공정보다 더욱 효과적인 공정을 개발하였다.

• KSTLE International Journal
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• v.9 no.1_2
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• pp.10-12
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• 2008

Silicon micro-patterns were fabricated on Si (100) wafers using photolithography and DRIE (Deep Reactive Ion Etching) fabrication techniques. The patterned shapes included micro-pillars and micro-channels. After the fabrication of the patterns, the patterned surfaces were chemically modified by coating Z-DOL (perfluoropolyether, PFPE) thin films. The surfaces were then evaluated for their micro-friction behavior in comparison with those of bare Si (100) flat, Z-DOL coated Si (100) flat and uncoated Si patterns. Experimental results showed that the chemically treated (Z-DOL coated) patterned surfaces exhibited the lowest values of coefficient of friction when compared to the rest of the test materials. The results indicate that a combination of both the topographical and chemical modification is very effective in reducing the friction property. Combined surface treatments such as these could be useful for tribological applications in miniaturized devices such as Micro/Nano-Electro-Mechanical-Systems (MEMS/NEMS).

• ETRI Journal
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• v.35 no.4
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• pp.603-609
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• 2013

In this paper, we present a 600-V reverse conducting insulated gate bipolar transistor (RC-IGBT) for soft and hard switching applications, such as general purpose inverters. The newly developed RC-IGBT uses the deep reactive-ion etching trench technology without the thin wafer process technology. Therefore, a freewheeling diode (FWD) is monolithically integrated in an IGBT chip. The proposed RC-IGBT operates as an IGBT in forward conducting mode and as an FWD in reverse conducting mode. Also, to avoid the destructive failure of the gate oxide under the surge current and abnormal conditions, a protective Zener diode is successfully integrated in the gate electrode without compromising the operation performance of the IGBT.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2392-2394
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• 2005

This paper presents a tuneable bandstop resonator with two possible configurations, it can be used to tune its center frequency, or it can be used to tune its bandwidth. The tuneable bandstop resonator has potential application in microwave communications receivers, where it can be used to tune out interfering signals. The proposed resonator is comb actuated, where the resonator's displacement produces different values of frequency or bandwidth, this is achieved by decoupling electromagnetic energy from a main transmission line. The proposed fabrication process for the resonator is by anodic bonding pyrex glass and tow resistivity silicon, where the comb resonator structure is patterned by deep reactive ion etching (DRIE). This paper presents the resonator and actuator design in both configurations, as well as the fabrication process intended for its development.

• KSTLE International Journal
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• v.8 no.2
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• pp.26-28
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• 2007

Si(100) surfaces were topographically modified i.e. the surfaces were patterned at micro-scale using photolithography and DRIE (Deep Reactive Ion Etching) fabrication techniques. The patterned shapes included micro-pillars and microchannels. After the fabrication of the patterns, the patterned surfaces were chemically modified by coating a thin DLC film. The surfaces were then evaluated for their friction behavior at micro-scale in comparison with those of bare Si(100) flat, DLC coated Si(100) flat and uncoated patterned surfaces. Experimental results showed that the chemically treated (DLC coated) patterned surfaces exhibited the lowest values of coefficient of friction when compared to the rest of the surfaces. This indicates that a combination of both the topographical and chemical modification is very effective in reducing the friction property. Combined surface treatments such as these could be useful for tribological applications in miniaturized devices such as Micro-Electro-Mechanical-Systems (MEMS).