• Journal of Power Electronics
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• 제13권6호
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• pp.964-974
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• 2013

A modified direct torque control (DTC) method based on torque angle is proposed for interior permanent-magnet synchronous motor (IPMSM) drivers used in electric vehicles (EVs). Given the close relationship between torque and torque angle, proper voltage vectors are selected by the proposed DTC method to change the torque angle rapidly and regulate the torque quickly. The amplitude and angle of the voltage vectors are determined by the torque loop and stator flux-linkage loop, respectively, with the help of the position of the stator flux linkage. Furthermore, to satisfy the torque performance request of EVs, the nonlinear dead-time of the invertor caused by parasitic capacitances is considered and compensated to improve steady torque performance. The stable operation region of the IPMSM DTC driver for voltage and current limits is investigated for reliability. The experimental results prove that the proposed DTC has good torque performance with a brief control structure.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.144-146
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• 2018

In order to meet the harmonics standards such as IEEE 519 and P1547 the output quality of a grid connected inverter should satisfy a certain level of Total Harmonic Distortion (THD) value. However, the output quality of an inverter gets degraded due to the grid voltage harmonics, the dead time effects and the nonlinearity of the switches, which all contributes to a higher THD value of the output. In order to meet the required THD value for the inverter output under the distorted grid condition the use of harmonic controller is essential. In this paper a novel feedforward harmonic compensation method is proposed in order to effectively eliminate the low order harmonics in the inverter current to the grid. In the proposed method, unlike the conventional harmonic control methods, the hamonic components are directly compensated by the feedforward terms generated by the PR controller with the grid current in the stationary frame. The proposed method is simple in implementation but powerful in eliminating the harmonics from the output. The effectiveness of proposed method is verified through the PSIM simulation and the experiments with a 5kW single phase grid connected inverter.

• 전력전자학회논문지
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• 제24권3호
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• pp.215-227
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• 2019

Grid-connected inverters should satisfy a certain level of total harmonic distortion (THD) to meet harmonics standards, such as IEEE 519 and P1547. The output quality of an inverter is typically degraded due to grid voltage harmonics, dead time effects, and the device's turn-on/turn-off delay, which all contribute to increasing the THD value of the output. The use of a harmonic controller is essential to meet the required THD value for inverter output under a distorted grid condition. In this study, an improved feedforward harmonic compensation method is proposed to effectively eliminate low-order harmonics in the inverter current to the grid. In the proposed method, harmonic components are directly compensated through feedforward terms generated by the proportional resonant controller with the grid current in a stationary frame. The proposed method is simple to implement but powerful in eliminating harmonics from the output. The effectiveness of the proposed method is verified through simulation using PSIM software and experiments with a 5 kW single-phase grid-connected inverter.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.274-277
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• 1999

The paper describes a implementation of space vector pulse-width modulation (SVPWM) voltage source inverter using Field Programmable Gate Array(FPGA) for a induction motor control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QL16X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed FPGA for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance voltage source inverter drives. Simulation and Implementation results are shown to verify the usefulness of FPGA as a Application Specific Integrated Circuit(ASIC) in power electronics applications

• 한국산업융합학회 논문집
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• 제2권2호
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• pp.103-108
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• 1999

The paper describes a implementation of space vector pulse-width modulation voltage source inverter and interfacing of DSP using field programmable gate array(FPGA) for a induction motor vector control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QLl6X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed Application Specific Integrated Circuit(ASIC) for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance induction motor drives with a voltage source inverter. Simulation and implementation results are shown to verify the usefulness of ASIC in a motor drive system and power electronics applications.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.71-73
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• 2019

The output current of the Grid Connected Inverter (GCI) can be polluted with harmonics mainly due to i) dead time in switches, ii) non-linearity of switches, iii) grid harmonics, and iv) DC link fluctuation. Therefore, it is essential to design the robust Harmonic Compensation (HC) technique for the improvement of output current quality and fulfill the IEEE 1547 Total harmonics Distortion (THD) limit i.e. <5%. The conventional harmonic techniques often are complex in implementation due to their i) additional hardware needs, ii) complex structure, iii) difficulty in tuning of parameters, iv) current controller compatibility issues, and v) higher computational burden. In this paper, to eliminate the harmonics from the GCI output current, a novel Digital Lock-In Amplifier (DLA) based harmonic detection is proposed. The advantage of DLA is that it extracts the harmonic information accurately, which is further compensated by means of PI controller in feed forward manner. Moreover, the proposed HC method does not require additional hardware and it works with any current controller reference frame. To show the effectiveness of the proposed HC method a 5kW GCI prototype built in laboratory. The output current THD is achieved less than 5% even with 10% load, which is verified by simulation and experiment.

• 대한임베디드공학회논문지
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• 제12권2호
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• pp.97-103
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• 2017

Thermal imaging is mainly used in military equipment required for night observation. In particular, technologies of uncooled thermal imaging detectors are being developed as applied to low-cost night observation system. Many system integrators require different specifications of the uncooled thermal imaging camera but their development time is short. In this approach, EOSYSTEM has developed a small size, TEC-less uncooled thermal imaging camera module with $32{\times}32mm$ size and low power consumption. Both domestic detector and import detector are applied to the EOSYSTEM's thermal imaging camera module. The camera module contains efficient infrared image processing algorithms including : Temperature compensation non-uniformity correction, Bad/Dead pixel replacement, Column noise removal, Contrast/Edge enhancement algorithms providing stable and low residual non-uniformity infrared image.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.97-98
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• 2016

일반적으로 산업체에서 사용되는 전압형 PWM(Pulse Width Modulation) 인버터는 2개의 스위칭 소자가 직렬 연결된 단상하프 브릿지 회로를 기본 회로로 사용한다. 보통 극(pole), 암(arm) 또는 레그(leg)라 불리며 상보적으로 스위칭한다. 하지만 게이팅 신호 전달의 시지연과 스위치의 온-오프 시간차이에 의해 두 스위치가 동시에 켜지는 단락 사고를 방지하기 위해 데드 타임을 사용한다. 데드 타임은 직렬 연결된 두 스위치를 동시에 끔으로써 인버터의 안정적인 동작을 보장하지만 인버터 출력 전압 제어가 불가능하여 전압 및 전류 왜곡과 소음, 진동을 야기한다. 본 논문에서는 데드 타임 보상을 위한 적절한 전압 선정 방법에 대해 알아본다. 데드 타임 보상 전압 선정을 위해 부하 전류의 6고조파 성분을 추출, 비교하여 적절한 데드 타임 보상 전압을 선정하였으며 실험을 통해 그 유효성을 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.493-494
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• 2016

본 논문에서는 계통연계형 단상 인버터의 데드타임 영향을 보상하는 새로운 알고리즘을 제시한다. 데드타임은 전력용 반도체 스위치를 제어하기 위한 PWM 신호 출력시 인버터의 동일 레그에서 두 스위칭 소자가 동시에 턴-온 되는 경우 발생하는 단락을 방지하기 위해 삽입된다. 이러한 데드타임은 인버터 출력전압에 전원주파수의 기본파 및 홀수차 고조파를 야기하며 그로 인해 상전류 역시 왜곡이 발생된다. 본 논문에서는 H-bridge 인버터의 구조를 가지는 계통연계형 단상 인버터에서 데드타임에 의한 인버터 출력전압 및 상전류의 영향을 분석하고 계통측 상전류에 포함된 고조파 성분을 제거하기 위하여 SOGI(Second-order Generalized Integrator)를 활용한 새로운 보상 알고리즘을 제안한다. 시뮬레이션과 실험을 통해 제안하는 알고리즘의 효용성을 검증한다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.1968-1970
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• 1997

유도전동기의 속도 제어 장치로 인버터의 사용이 두드러지고 있으며, 소용량 가변속 드라이브에 있어서 그 제어성의 양호한 범용 인버터 구동이 현 인버터 시장의 주류를 이루고 있다. 그러나 범용 인버터는 종래의 TR구동 인버터에 비해 스윗칭 횟수가 많고 데드타임의 영향이 크게 나타난다. 본 논문에서는 유도전동기를 운전하는 범용인버터에 대하여 데드타임으로 인한 문제 해결 및 전류 왜곡 개선 방법을 제안하였고, 이를 실험적인 결과로 입증하였다.