• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.911-915
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• 1987

In this thesis, the architecture and design of IWS(Inter Working System) which interconnects two different networks (PSDN: Packet Switched Data Network, PSTN:Public Switched Telephone Network) are described. IWS provides interconnection services for the compatibility of communication between two networks. IWS consists of network interface protocols, protocol conversion facilities and management facilities.

• 한국전산유체공학회:학술대회논문집
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• 2003.10a
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• pp.88-90
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• 2003

We implement Realtime Air Diffusion Prediction System which is designed for air diffusion simulations with four-dimensional data assimilation. For realtime running, we parallelize the system using MPI (Message Passing Interface) on distributed-memory parallel computers and build a cluster computer which links high-performance PCs with high-speed interconnection networks. We use 162­CPU nodes and a Myrinet network for the cluster

• Electronics and Telecommunications Trends
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• v.9 no.2
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• pp.87-101
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• 1994

전기통신 시장에 있어서 경쟁의 도입은 통신 시장의 활성화와 서비스 향상을 위해 필요불가결하다는 결론하에 구미각국을 중심으로 경쟁확대를 추진하고 있다. 이에 우리 나라에서도 통신사업체계의 개편을 통해 그동안 독점으로 운영되어 오던 전화사업의 일부에 경쟁이 이루어지고 있는 실정이고 1994년부터 부가통신사업이 전면 자유화가 이루어질 입장에서 1994년 체신부 주관하에 상호접속전담반에서 제정한 데이터망 접속기준(안)을 중심으로 접속에 필요한 기술적인 면과 정책적인 면을 분석함으로써 데이터망 접속에 필요한 기술사항을 제시하고자 한다.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.666-669
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• 1993

The space charge fields, including intermode apace charge fields in photorefractive material with two impurities are obtained for the small light intensity at large modulation depth, and their implication of high-capacity volume holographic interconnection are presented. In the following data regions the effect of intermode space charge fields are suppresed and the criteria for optimal implementation of volume holographic interconnections are satisfied.

• Informatization Policy
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• v.18 no.3
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• pp.88-107
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• 2011

This paper proposes a prepaid system promotion policy for the 3G(WCDMA) MVNO with regard to the newly included paragraphs 3, 4 and 5 of Article 32 (User Protection) and Article 38 (Provision of Wholesale Telecommunications Services) of the Telecommunication Business Act, which was revised on March 22, 2010. As of June 2011, there are only a few prepaid system subscribers to the mobile communications service due to various limitations, including prepay, interconnection, carrier selection, the MVNO policy, and number portability. However, overseas communications service regulatory agencies and service providers are increasingly presenting policies and strategies for mobile prepaid plans, in order to accommodate the various customer demands that are increasing the use of smart phones and data. This paper advances various proposals concerning promotion of the prepaid system by the 3G MVNO under the current Telecommunication Business Act, including separation of the prepaid data system and the mobile network; introduction of a monthly fixed-rate hybrid prepaid system, a top-up system and USIM system; introduction of mobile network carrier selection; differentiated retail discounts between prepaid and post-paid prices; revision of the retail discount policy for wholesale provision; increase in the number of mandatory service providers; and in-depth consideration of the introduction of a number portability policy for the prepaid and post-paid systems.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.38 no.1
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• pp.45-50
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• 2014

A vibration test coupon is prepared with nine plastic ball grid array packages on a printed circuit board using SnPb solders, and a random vibration test is conducted on the coupon. Life data from the test are analyzed, and it is shown that over the board, life data is location-dependent. For investigating this location dependency, a finite element model is developed and the equivalent stresses, which are defined based on the stress response functions at each node, are investigated. It is shown that one of the corner solder balls has the maximum equivalent stress at a package during the test. Finally, it is demonstrated that the maximum equivalent stress and durability life are inversely proportional.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.4
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• pp.302-312
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• 2001

As the data transfer rate between chips gets higher, both crosstalk and SSN (Simultaneous Switching Noise) deteriorate seriously the performance of a system. The proposed interface scheme uses P-CTR and N-CTR(Positive/Negative Constant Transition Rate) which encodes data at both falling and rising edges, where the transition directions of N-CTR and P-CTR are opposite. And the proposed bus system places two P-CTR drivers and two N-CTR drivers alternatively. In the proposed P/N-CTR interface scheme, the signals of neighboring interconnection lines at both sides of a bus will not switch simultaneously in the same direction, which leads to reduction in the maximum crosstalk and SSN compared to conventional interfaces. For verification of noise reduction of the proposed interface scheme, the scheme is applied to several kinds of bit-wide buses with various interconnection structures, and HSPICE simulation was performed with 0.35 ${\mu}{\textrm}{m}$ SPICE parameters. The simulation results show that in the 32-bit or less wide bus, the maximum SSN and crosstalk are reduced to at least 26.78% and 50%, respectively in comparison with the conventional interface scheme.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.1
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• pp.12-20
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• 2006

Recently, new dispersed sources (DSG) such as Photovoltaic, Wind Power, fuel cell etc. are interconnected with distribution systems as national projects for alternative energy preparing for oil crisis. This paper deals with the optimal evaluation algorithms in the case where new dispersed sources are operated in distribution systems. It is very difficult and complicated to handle the interconnection issues for proper voltage managements, because professional skills and enormous amounts of data for the evaluations are required. The typical evaluation algorithms mainly depending on individual ability and quality of data acquired, inevitably cause the different results f3r the same issue, so unfair and subjective evaluations are unavoidable. In order to overcome these problems, this paper proposes reasonable and general algorithms based on the standard model system and proper criterion, which offers the fair and objective evaluations in any case.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.9
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• pp.465-474
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• 2005

For high density SoC design, on-chip communication based on bus interconnection encounters bandwidth limitation while an NoC(Network-on-Chip) approach suffers from unacceptable complexity in its Implementation. This paper introduces a new on-chip communication protocol, SNP (SoC Network Protocol) to overcome these problems. In SNP, conventional on-chip bus signals are categorized into three groups, control, address, and data and only one set of wires is used to transmit all three groups of signals, resulting in the dramatic decrease of the number of wires. SNP efficiently supports master-master communication as well as master-slave communication with symmetric channels. A sequencing rule of signal groups is defined as a part of SNP specification and a phase-restoration feature is proposed to avoid redundant signals transmitted repeatedly over back-to-back transactions. Simulation results show that SNP provides about the same bandwidth with only $54\%$ of wires when compared with AMBA AHB.

• 제어로봇시스템학회:학술대회논문집
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• 1988.10a
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• pp.697-700
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• 1988

This paper describes the design of a hardware system for ECG feature extraction based on pipeline processor consisting of three computers. ECG data is acquisited by 12 bit A/D converter with hardware QRS triggred detector. Four diagnostic parameters-heart, axis, and ST axis, and ST segment are used for the classification and the diagnosis of arrhythmia. The functions of the main CPU were distributed and processed with three microcomputers. Therefore the effective data process and the real time process using microcomputer can be obtained. The interconnection structure consisting of two common memory units is designed to decrease the delay time caused by data transfer between processors and designed by which the delay time can be taken 1% of one clock period.