• Title/Summary/Keyword: DSP 시스템

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Implement of a Remote Solid State Power Controller by DSP (DSP를 이용한 원격전력제어 장치 구현)

  • Jeon, Yeong-Cheol;Lee, Hyuek-Jae;Chong, Won-Yong;Park, Young-Seak
    • Journal of the Korean Institute of Intelligent Systems
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    • v.20 no.5
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    • pp.728-733
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    • 2010
  • The conventional electro-mechanical circuit break and relay are widely used in large-sized DC power system. However, recently due to high reliability, remote controllability and small power dissipation of a RSSPC(Remote Solid State Power Controller), high-friendly DC power systems have increasingly adopted the RSSPC as a essential element. In this paper, we have conducted a mathematical modeling to analyze the performance of the proposed RSSPC system with the optimal signal range for $I^2t$. Based on the calculation, the RSSPC system has been implemented by DSP.

Implementation of Intelligent Fire-Detection Systems Using DSP (DSP를 이용한 지능형 화재검출시스템 구현)

  • Kim, Hyun-tae;Song, Chong-kwan;Park, Jang-sik
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.411-414
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    • 2009
  • Many victims and property damages are caused in fires every year. In this paper, intelligent fire-detection systems with embedded fire-detection algorithms for early fire detection and alarm is proposed to reduce fire damages by using image processing technique, high speed digital signal processor(DSP) technique, and information technique. The fire detection algorithms used for the proposed systems consist of flame and smoke detection algorithms. If flame or smoke is detected respectively, the corresponding alarm signal can be transferred to management computer. And if flame and smoke is detected simultaneously, the fire alarm signal shall be generated. Through several experiments in the physical environment, it is shown that the proposed system works well without malfunction.

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Real-time Optimization of H.264 Software Encoder on Embedded DSP System (임베디드 DSP 기반 시스템을 위한 H.264 소프트웨어 부호기의 실시간 최적화)

  • Roh, Si-Bong;Ahn, Hee-June;Lee, Myeong-Jin;Oh, Hyuk-Jun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.10C
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    • pp.983-991
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    • 2009
  • While H.264/AVC is in wide use for multimedia applications such as DMB and IPTV service, we have limited usage cases for embedded real-time applications due to its high computational demand. The paper provides judicious guide line for optimization method selection, by presenting the detailed experiments data through the development process of a real time H.264 software encoder on embedded DSP. The experimental analysis includes an intensive profiling analysis, fast algorithm application, optimal memory assignment, and intrinsic-based instruction selection. We have realized a real-time software that encodes CIF resolution videos 15 fps on TMS320DM64x processors.

DSP Embeded Hardware for Non-contact Bio-radar Heart and Respiration Rate Monitoring System (DSP를 이용한 비 접촉식 도플러 바이오 레이더 생체신호 모니터링 시스템 임베디드 하드웨어의 개발)

  • Kim, Jin-Seung;Jang, Byung-Jun;Kim, Ki-Doo
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.4
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    • pp.97-104
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    • 2010
  • In this paper, we provide an embedded type non-contact bio-radar heart and respiration rate monitoring system. We implemented the rate finding algorithm into the embedded system. The high-speed and reliable real-time signal processor is then tested. To avoid null-point data loss problem, we applied quadrature demodulation. Among several other combining techniques, we suggest arctangent demodulation for quadrature channel combining and DSP is used for real-time signal processing. We also suggest DC-offset compensation technique to preserve the wanted DC components of the IQ signals for accurate demodulation while keeping the dynamic range of the ADC lower. Using Texas Instrument C6711 series DSP and external 12Bit ADC, we implemented proper elliptic digital filter and autocorrelation detection algorithm for robust commercial hand held device.

An Optimal ILP Algorithm of Memory Access Variable Storage for DSP in Embedded System (임베디드 시스템에서 DSP를 위한 메모리 접근 변수 저장의 최적화 ILP 알고리즘)

  • Chang, Jeong-Uk;Lin, Chi-Ho
    • KIPS Transactions on Computer and Communication Systems
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    • v.2 no.2
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    • pp.59-66
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    • 2013
  • In this paper, we proposed an optimal ILP algorithm on memory address code generation for DSP in embedded system. This paper using 0-1 ILP formulations DSP address generation units should minimize the memory variable data layout. We identify the possibility of the memory assignment of variable based on the constraints condition, and register the address code which a variable instructs in the program pointer. If the process sequence of the program is declared to the program pointer, then we apply the auto-in/decrement mode about the address code of the relevant variable. And we minimize the loads on the address registers to optimize the data layout of the variable. In this paper, in order to prove the effectiveness of the proposed algorithm, FICO Xpress-MP Modeling Tools were applied to the benchmark. The result that we apply a benchmark, an optimal memory layout of the proposed algorithm then the general declarative order memory on the address/modify register to reduce the number of loads, and reduced access to the address code. Therefor, we proved to reduce the execution time of programs.

Digital Hearing Aids Specific $\mu$DSP Chip Design by Verilog HDL

  • Jarng, Soon-Suck;Chen, Lingfen;Kwon, You-Jung
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.190-195
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    • 2005
  • The hearing aid chip described in this paper is an analog & digital mixed system. The design focuses on the$\mu$DSP core. This $\mu$DSP core includes internal time delays to two inputs from front and rear microphones. The paper consists of two parts; one is the composure and signal processing algorithm of digital hearing aids and the other is Verilog HDL codes for$\mu$DSP cores. All digital modules in the design were coded and synthesized by Verilog HDL codes which were verified by Mentor Graphics and Synopsis semiconductor chip design tools.

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Robot controller with 32-bit DSP chip (32 비트 DSP를 사용한 로보트 제어기의 개발)

  • 김성권;황찬영;전병환;이규철;홍용준
    • 제어로봇시스템학회:학술대회논문집
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    • 1991.10a
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    • pp.292-298
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    • 1991
  • A new 6-axis robot controller with a high-speed 32-bit floating-point DSP TMS32OC30 has been developed in Samsung Electronics. The controller composed of Intel 80386 microprocessor for the main controller, and TKS32OC30 DSP chip for joint position controller. The characteristics of the controller are high sampling rate of 200us and fast reponsibility. The main controller supports MS-DOS, kinematics, trajectory planning, and sensor fusion functions which are vision, PLC, and MAP. The one high speed DSP chip is used for controlling 6 axes of a robot in 200us simultaneously. The control law applied is PID controller including a velocity feedforvard in joint position controller. The performance tests, such as command following, CP, were conducted for the controller integrated with a 6 axes robot developed in Samsung Electronics. The results showed a good performance. This controller can also perform the system control with other controllers, the communication with high priority controllers, and visual information processing.

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Implementation of MPEG/Audio Decoder based on RISC Processor With Minimized DSP Accelerator (DSP 가속기가 내장된 RISC 프로세서 기반 MPEG/Audio 복호화기의 구현)

  • Bang Kyoung Ho;Lee Ken Sup;Park Young Cheol;Youn Dae Hee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.12C
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    • pp.1617-1622
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    • 2004
  • MPEG/Audio decoder for mobile multimedia systems requires low power consumption. Implementations of AV decoder using a single RISC processor often need high power consumption owing to cash-miss in case of insufficient cash memory. In this paper, we present a MPEG/Audio decoder for mobile handset applications and implement it on a RISC processor embedding a minimized DSP accelerator. Audio decoding algorithm is splined into two parts; computation intensive and control intensive parts. Those parts we, respectively, allocated to DSP and RISC core, which are designed to run in parallel to increase the processing efficiency. The proposed system implements MP3 and AAC decoders at l7MHz and 24MHz clocks, which are reductions of 48% and 40% of complexities in comparison with implementations on a single RISC processor. The proposed method is adequate for mobile multimedia applications with insufficient cash memory.

QLQG/LTR Control of the Nonlinear Timing-Belt Driving Systme Using DSP (DSP를 이용한 비선형 타이밍 벨트 구동시스템의 QLQG/LTR 제어)

  • 한성익;방두열
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.10 no.4
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    • pp.40-47
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    • 2001
  • In this pater, the QLQG/LTR control method is applied for the position control of the nonlinear timing belt driving sys-tem. Parameters fo the plant are identified by genetic algorithm and nonlinear elements, such as Coulomb friction and dead-zone, and quasi-linearized by RIDE method. Comparing with the LQG/LTR contro. the QLQG/LTR has similar structures of the LQG/LTR, but this method can consider nonlinear effects in designing the controller. Thus, the QLQG/LTR control system is robust to hard nonlinearities such as Coulomb friction, dead-zone, etc. Forma given hard non-linear system through experiments, it is shown that the tracking performance of the QLQG/LTR control system can be very improved that the LQF/LTR control system.

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Implementation of Image Gradient Detection System with High-Performance DSP (고성능 DSP를 이용한 영상기울기 검출 시스템 구현에 관한 연구)

  • Lee, Seung-Joon;Rhee, Sang-Burm
    • Journal of the Korea Computer Industry Society
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    • v.9 no.3
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    • pp.129-136
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    • 2008
  • This paper implement image gradient detection algorithm with high-performance DSP. First the NTSC color image convert to B/W image. The image gradient detect with Hough transform after edge detection image from the B/W images. The value of image gradient detection control the servo motor to original position of the NTSC camera if camera base to the left or right tilt.

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