• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.475-479
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• 2000

The box capacitor structure with H5G-Si described here reliably achieves a cell capacitance of 28fF with a cell area of a 0.482f${\mu}{\textrm}{m}$$^2$ for 128Mbit DRAM. An H5G-Si formation technology with seeding method, which employs Si$_2$H$_{6}$ molecule irradiation and annealing, was applied for realizing 64Mbit and larger DRAMS. By using this technique, grain size controlled H5G-Si can be fabricated on in-situ phosphorous doped amorphous silicon electrodes. The HSG-Si fabrication technology achieves twice the storage capacitance with high reliability for the stacked capacitors.s.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.5
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• pp.791-796
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• 2017

In this study, we investigated the influence of the fabrication process of stacked capacitors on the cell capacitance by using Load Lock (L/L) LPCVD system for dielectric thin film of DRAM capacitor. As a result, it was confirmed that the capacitance difference of about 3-4 fF is obtained by reducing the effective thickness of the oxide film by about $6{\AA}$ compared to the conventional non-L/L device. In addition, Cs was found to be about 3-6 fF lower than the calculated value, even though the measurement range of the thickness of the nitride film as an insulating film was in a normal management range. This is because the node poly FI CD is managed at the upper limit of the spec, resulting in a decrease in cell surface area, which indicates a Cs reduction of about 2fF. Therefore, it is necessary to control the thickness of insulating film and CD management within 10% of the spec center value in order to secure stable Cs.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.7
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• pp.1491-1496
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• 2005

We fabricated the $Pb_{0.72}La_{0.28}TiO_3$ (PLT(28)) thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of $100\%$ perovskite phase by drying at $350^{\circ}C$ after each coating and final annealing at $650^{\circ}C$. Electrical properties of PLT(28) thin film were measured through formation on the $Pt/Ti/SiO_2/Si$ substrate and its dielectric constant and leakage current density were measured as 936 and $1.1{\mu}A/cm^2$, respectively.

• Journal of the Korean Ceramic Society
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• v.42 no.2 s.273
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• pp.94-98
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• 2005

$RuO_2$ is widely studied as a lower electrode material for high dielectric capacitors in DRAM (Dynamic Random Access Memories) and FRAM (Ferroelectric Random Access Memories). In this study, the effects of hydrogen, oxygen, and argon Electron Cyclotron Resonance (ECR) plasma pretreatments on deposited by Metal Organic Chemical Vapor Deposition (MOCVD) $RuO_2$ nucleation was investigated using X-Ray Diffraction (XRD), Scanning Electron Microscopy (SEM), and Atomic Force Microscopy (AFM) analyses. Argon ECR plasma pretreatment was found to offer the highest $RuO_2$ nucleation density among these three pretreatments. The mechanism through which $RuO_2$ nucleation is enhanced by ECR plasma pretreatment may be that the argon or the hydrogen ECR plasma removes nitrogen and oxygen atoms at the TiN film surface so that the underlying TiN film surface is changed to Ti-rich TiN.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.865-868
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• 2005

We fabricated the $Pb_{0.72}La_{0.28}TiO_3 (PLT(28))$ thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of 100% perovskite phase by drying at 350$^{\circ}C$ after each coating and final annealing at 650$^{\circ}C$. Electrical properties of PLT(28) thin film were measured through formation on the Pt/Ti/SiO$_2$/Si substrate and its dielectric constant and leakage current density were measured as 936 and 1.1${\mu}$A/cm$^2$, respectively

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.490-492
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• 2010

A swing level controlled voltage-mode transmitter is proposed to support a stub series-terminated logic channel with center-tapped termination. This transmitter provides a swing level control to support the diagnostic mode and improve the signal integrity in the absence of the destination termination. By using the variable parallel termination, the proposed transmitter maintains the constant output impedance of the source termination while the swing level is controlled. Also, the series termination using an external resistor is used to reduce the impedance mismatch effect due to the parasitic components of the capacitor and inductor. To verify the proposed transmitter, the voltage-mode driver, which provides eight swing levels with the constant output impedance of about $50{\Omega}$, was implemented using a 70nm 1-poly 3-metal DRAM process with a 1.5V supply. The jitter reduction of 54% was measured with the swing level controlled voltage-mode driver in the absence of the destination termination at 1.6-Gb/s.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.13-21
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• 2010

A energy efficient $V_{pp}$ generator using a variable pumping frequency for mobile DRAM is presented in this paper. The proposed $V_{pp}$ generator exploits 3 stages of a cross-coupled charge pump for energy efficiency. Instead of using a fixed pumping frequency in the conventional $V_{pp}$ generator, our proposed $V_{pp}$ generator adopts a voltage-controlled oscillator and uses variable frequencies to reduce the ramp-up time. As a result, our $V_{pp}$ generator generates 3.0 V output voltage with 24.0-${\mu}s$ ramp-up time at 2 mA current load and 1 nF capacitor load with 1.2 V supply voltage. Experimental results show that the proposed $V_{pp}$ generator consumes around 26% less energy (1573 nJ $\rightarrow$ 1162 nJ) and reduces 29% less ramp-up time (33.7-${\mu}s$ $\rightarrow$ 24.0-${\mu}s$) compared to the conventional approach.

• Journal of the Korean Vacuum Society
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• v.2 no.2
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• pp.246-254
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• 1993

In order to increase the capacitance of storage electrode in the DRAM capacitor, two approaches were performed. First, hemispherical and rugged poly silicon films were made by LPCVD to increase the effective surface area of storage electrode. The even surface morphology of conventional poly silicon electrode was changed into the uneven surface of hemispherical of rugged poly silicon films. Second, PECVD $Ta_2O_5$ dielectric films were deposited and thermally treated to study the dielectrical characteristics of $Ta_2O_5$ film on each electrode. MIS capacitors with $Ta_2O_5$ films were electrically characterized by I-V, C-V and TDDB measurements. As a result, the capacitance of the electrode with uneven surface were increased by a factor of 1.2~1.5 and leakage current was increased compared with those of even surface. TDDB result indicates that the electrode with uneven surface has dielectrically more degraded than that of even surface. These results can be helpful as a basic research to develop new generation DRAM capacitors with $Ta_2O_5$ films.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.71-74
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• 1996

Ta$_2$O$_{5}$ film ale recognized as promising capacitor dielectric for future DRAM\`s. The electrical properties of Ta$_2$O$_{5}$films greatly depend on the heating condition. In the practical fabrication process, several annealing process, such as the annealing of Al in H$_2$(about 40$0^{\circ}C$) and reflow of BPSG (borophosphosilicate glass) film in $N_2$(about 80$0^{\circ}C$), exist after deposition of Ta$_2$O$_{5}$ film. In this paper, we describe the temperature effect on the electrical properties of W/Ta$_2$O$_{5}$/Si structure. The thin film of Ta$_2$O$_{5}$ and tungsten have been deposited on p-si(100) wafer using the sputtering system. The heating temperature was varied from 500 to 90$0^{\circ}C$ in $N_2$for 30min and The degree of temperature is 100\`C. In a log(J/E$^2$) Vs 1/E plot of typical I-V data, we find a linear relationship for the temperature of 500, $600^{\circ}C$ and as deposition. This could indicate Fowler-Nordheim tunneling as the dominant mode of current transports. However, we can not find a linear relationship for the temperature above $700^{\circ}C$. This could not indicate Fowler-Nordheim tunneling as the dominant mode of current transport. The high frequency (1MHz) capacitance-voltage (C-V) of W/Ta$_2$O$_{5}$/Si Capacitor were investigated on the basis of shift in the threshold voltage and dielectric constant. The magnitude of the threshold voltage and dielectric constant depends on the heating temperature, and increases with heating temperature.temperature.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.5
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• pp.33-39
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• 1998

The BST (Ba$_{1-x}$ Sr$_{x}$TiO$_{3}$)(50/50) thin film has been grown by RF magnetron reactive sputtering and its characteristics such as crystallization, surface roughness, and electrical properties have been investigated with varying the film thickness. The crystallization and surface roughness of BST thin film are investigated by using XRD and AFM, respectively The BST thin film anealed at 800.deg. C for 2 min has pure perovskite structure and good surface roughness of 16.1.angs.. We estimate that the thickness and dielectric constant of interface layer between BST film and electrode are 3nm and 18.9, respectively, by measuring the capacitance with various film thickness. As the film thickness increases form 80nm to 240nm, the dielectric constant at 10kHz increases from 199 to 265 and the leakage current density at 200kV/cm decreases from 0.682.mu.A/cm$^{2}$ to 0.181 .mu.A/cm$^{2}$. In the case of 240nm-thick BST thin film, the charge storage density and leakage current density at 5V are 50.5fC/.mu.m$^{2}$ and 0.182.mu.A/cm$^{2}$, respectively. The values indicate that the BST thin film is a very useful dielectric material for the DRAM capacitor.or.