• ETRI Journal
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• v.46 no.2
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• pp.238-249
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• 2024

Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.4
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• pp.264-271
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• 2011

ILS(Instrument Landing System) is the international standard system for approach and landing guidance. ILS was adopted by ICAO(International Civil Aviation Organization) in 1947 and is currently being used in commercial systems. To design the digital transmitter and receiver modules that can be mounted in the integrated ILS, we propose the digital design methods of digital double AM modulator and demodulator using FPGA chip, DDS(Direct Digital Synthesizer) for generation of sampling clock, demodulator of DDC(Digital Down Converter) structure, and spectrum analyzer using DSP chip. We demonstrate the efficiency of the proposed design method through experiments using developed transmitter and receiver modules. This system can be used as a high-performance commercial system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.9
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• pp.1215-1223
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• 2020

Recently, the number of natural disasters caused by inclement weather conditions such as localized heavy rainfall, Typhoon, etc. is increasing in Korea, which requires relevant prevention and water management measures. Rain gauges installed on the ground have strengths in continuously·directly measures ground precipitation but cannot provide accurate information on spatial precipitation distribution in the areas without the rain gauges. The present research has designed and developed an electromagnetic-based multi-purpose precipitation gauge(EWRG, Electromagnetic Wave Rain Gauge) that can measure rainfall at the real time, by overcoming spatial representativeness. In this paper, we propose an FPGA-based signal processing design method for EWRG. The signal processing of the EWRG was largely designed by calculating the ADC and DDC of the LFM waveform, pulse compression, correlation coefficient and estimating the precipitation parameter. In this study, the LFM waveform and pulse compressed signal were theoretically analyzed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.5
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• pp.411-421
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• 1988

This paper offers a method to design CCD four-valued circuits using the tabular method. First, the four-valued logic function is decomposed by hand-calculation or computer program. Nest, the algorithm is derived form the tabular method based on the decomposition process to realize the DDC four-valued circuit. According to this algorithm, the two-variable four valued logic function is decomposed and realized by CCD network with four basic gates. The synthesis method in this paper proves that the number of devices and cost is considerably reduces as compared with the existing methods to realize the same logic functions.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.5
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• pp.71-77
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• 2020

Recently, the tracking radar has confirmed the necessity of developing a small tracking radar that can be operated without various restrictions in various environments. In addition, the performance of a small tracking radar requires equal to or higher than the existing tracking radar. Such a small tracking radar can be implemented through miniaturization and low power of existing tracking radar. In this paper, the role and function of a signal processor for a small tracking radar are defined and we proposed a method to increase the efficiency of power consumption and miniaturization by minimizing the use of devices required to implement a signal processor for a small tracking radar. Used as a method for miniaturization, a device processor such as DDC and communication controller was implemented in an FPGA to design a signal processor for a small tracking radar. In addition, a low-power signal processor was designed by a power supply using a highly efficient switching regulator. Finally, the signal processor was verified by the performance test of the signal processor for the small tracking radar implemented, the Doppler tracking test using the signal processor on the small tracking radar, and the distance tracking test.

• Journal of IKEEE
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• v.20 no.2
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• pp.184-187
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• 2016

In this paper, we propose the sensor and the signal duplicator for the automatic building control. Developed duplicator realizes the sensor data collection apparatus and mimics the measured data and, thus, reduces the construction cost by using logical communication layer. Furthermore, the system supports the open protocols and can be associated with HMI(Human Machine Interface) used on the market. Developed duplicator is proved to be functional within the real environment. Measurement error rate, operating temperature, and operating humidity show very good results by the certified testing apparatus and organization.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.8
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• pp.1687-1694
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• 2011

In this paper, we propose the design procedure of a digital IF system for the OFDM based WLAN system and examine its performances. Along with the decision procedure of ADC sample rate, NCO frequency and the required decimation ratio, we show the decimation ratio is accomplished through the use of a CIC filter and a MHBF. We also show that the amplitude distortion occurred in the decimation filters can effectively be compensated by a ISOP filter and an additional FIR filter, which leads to the reduction of the overall hardware complexity. Finally, we examine the BER performance of the proposed system and compare it with a theoretical one that excludes filter non-linearities.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.6
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• pp.49-55
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• 2021

Recently, a small tracking radar requires the development of a small millimeter wave tracking radar having a high range resolution that can acquire and track a target in various environments and disable the target system with a single blow. Small millimeter wave tracking radar with high range resolution needs to implement a signal processor that can process wide bandwidth signals in real time and meet the requirements of small tracking radar. In this paper, we designed a signal processor that can perform the role and function of a signal processor for a small millimeter wave tracking radar. The signal processor for the small millimeter wave tracking radar requires the real-time processing of input signal of OOOMHz center frequency and OOOMHz bandwidth from 8 channels. In order to satisfy the requirements of the signal processor, the signal processor was designed by applying the high-performance FPGA (Field Programmable Gate Array) and ADC (Analog-to-digital converter) for pre-processing operations, such as DDC (Digital Down Converter) and FFT (Fast Fourier Transform). Finally, the signal processor of the small millimeter wave tracking radar was verified via performance test.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.8
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• pp.1790-1802
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• 1997

A wavelet transform coding method that fulfills the requirements of HD-VCR(high definition video casstte recorder) for studio applications in proposed. A constant bit rate is achieved by a forward rate control technique whcih determins the quantizer stepsize based on the coding results fo the previous frame. We also propose a two-level coder that consists of both the IDC(independently decodable code) and the DDC(dependently decodable code). To minimize error propagation, the transformed coefficients are restructured into transform blocks which are represented by a tree structure. The result shows thta the proposed coding scheme produces better picture quality with block effects than that of DCT(discrete cosine transform) based coding schemes at the same compression ratio. The proposed method meets most of the requirements of HD-VCR.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.11C
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• pp.1085-1097
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• 2009

We present a structure and design method of the D8PSK modem compatible with the VDL mode-2 standard and performance test results of the developed modem. In VDL mode-2, the raised cosine filter is used only in the transmitter and a general low pass filter is used in the receiver. Consequently, we can not achieve ISI reduction but can have better spectrum characteristics. Although there is 1~2 dB performance degradation with an un-matched filter compared to that with a matched filter, it is more important to minimize adjacent channel interference in narrow band communications. The transmit signal is generated digitally to avoid the problems(I/Q imbalance and DC offset etc.) of analog modulators. In addition the digital down converter using digital IF sampling technique is adopted for the receiver. This paper contains the overall configuration, design method and simulation results based in part on the previously proposed structures and algorithms. It is confirmed that the modem transmits and receives messages successfully at a speed of max. 870 km/h over ranges of up to 310 km through the ground and in-flight communication tests.