• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2795-2797
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• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both voltage-fed and current-fed electronic ballast. The proposed PFC circuits use valley-fill(VF) type DC-link stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant capacitors. In current-fed type, the charge pump capacitors are connected with the additional secondary-side of the power transformer. The measured PF and THD are higher than 0.99 and 15% for all proposed PFC circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for implementing cost-effective electronic ballast.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.241-244
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• 2001

This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage, This paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit id constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduce and the power factor improve. A circuit design method is shown by experimentation and confirmed simulation. It explained that compared conventional pulse-width modulated (PWM)inverter with half pulse-width modulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Journal of Electrical Engineering and Technology
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• v.12 no.1
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• pp.100-109
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• 2017

This paper proposes performance improvement schemes for sensorless PMSM control drive using a four-switch three-phase inverter (so-called B4 inverter). In the proposed scheme, the back-EMF estimation-based sensorless control algorithm is used to control the brushless PMSM without position sensors. In order to have stable operation, this paper presents a gain adjustment scheme that compensates the reduction of stable sensorless operation range as long as the rotor speed increases. In B4 topology, the center point of dc-link capacitors is connected to 3-phase load, and it is prone to have the load current distortion. Hence, to mitigate this problem, a distortion compensation scheme by modifying voltage commands using measured dc-link potentials is proposed in this paper. The validity of the proposed method is evaluated by simulations and experiments.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1593-1600
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• 2015

This paper proposes a novel compensation algorithm of current offset error for single-phase linear compressor in home appliances. In a half-bridge inverter, current offset error may cause unbalanced DC-link voltage when the DC-link is comprised of two serially connected capacitors. To compensate the current measurement error, the synchronous reference frame transformation is used for detecting the measurement error. When an offset error occurs in the output current of the half-bridge inverter, the d-axis current has a ripple with frequency equal to the fundamental frequency. With the use of a proportional-resonant controller, the ripple component can be removed, and offset error can be compensated. The proposed compensation method can easily be implemented without much computation and additional hardware circuit. The validity of the proposed algorithm is verified through experimental results.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.879-880
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• 2008

At the high speed operation, the boost negative bias can reduce the negative torque and increase the dwell angle, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with boost negative bias is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive capacitor network, the two capacitors can be connected in series and parallel in different condition. In proposed converter, the phase winding of SRM obtains general dc-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation and experimental results are done to verify the performance of proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.107-113
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• 2001

This paper describes dynamic performance analysis of a STATCOM based on 3-level inverter. Major attention is focused on the controller design for 3-level inverter, including regulator design for voltage sharing across the dc link capacitors. A detailed simulation model was developed with Matlab and a scaled hardware model was built and tested to verify the proposed approach. Both simulation and experimental results confirm that the developed controller can regulate the reactive power. The developed controller could be effectively applied to the actual hardware system for STATCOM.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.2
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• pp.54-61
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• 2015

In 3-phase 4-wire inverter, the unbalanced loads cause to increase the neutral current which brings the voltage deviation between the split dc-link capacitors to be larger. In order to solve this problem, a neutral leg is provided additively to the ordinary inverter circuit and the associated control methods are devised. This paper proposes a new neutral-leg controller based on a PR controller and shows relatively good performance even under unbalanced linear loads and nonlinear loads. The proposed control strategy illustrates its effectiveness under the various operating conditions through simulation works.

• Journal of Power Electronics
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• v.13 no.2
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• pp.313-321
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• 2013

This paper describes the operation analysis results of a communication-based DC micro-grid using a hardware simulator developed in the lab. The developed hardware simulator is composed of distributed generation devices such as wind power, photovoltaic power and fuel cells, and energy storage devices such as super-capacitors and batteries. Whole system monitoring and control was implemented using a personal computer. The power management scheme was implemented in a main controller based on a TMS320F28335 chip. The main controller is connected with the local controller in each of the distributed generator and energy storage devices through the communication link based on a CAN or an IEC61850. The operation analysis results using the developed hardware simulator confirm the ability of the DC micro-grid to supply the electric power to end users.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.217-221
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• 2001

This paper presents a new prototype of soft-switching DC-DC power converter with a high frequency transformer link which has two active power controlled switches in full bridge rectifier with capacitor input type smoothing filter. In this DC-DC converter, ZVS of the inverter in transformer primary side and ZCS of active rectifier area in secondary side can be completely achieved by taking advantage of parasitic inductor component of high-frequency transformer and loss less snubbing capacitors. Its operation principle and salient features are described. The steady-state operating characteristics of the proposed DC-DC power converter are illustrated and discussed on the basis of the simulation results in addition to the experimental ones obtained by 2kw-40kHz power converter breadboard set up.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2628-2631
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• 1999

One of the limitations of conventional ASCI for high-power induction motor drives is the high voltage that is produced in the commutation capacitors during the current commutation from one phase to another. Since the capacitor voltage appears directly on the semiconductor components, it increases their required voltage ratings. Also, the high-voltage spikes generated at the motor terminals may cause damage to the motor insulation. And we investigated how de input power is increased or decreased according to size of de link inductor. In this paper, de link inductor and clamping capacitor in GTO inverter suitable for induction motor drives are propose through experiment.