• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.11
• /
• pp.826-830
• /
• 2013

In this paper, we carried out the investigations of both etch characteristics and mechanisms for the $SnO_2$ thin films in $O_2/BCl_3/Ar$ plasma. The dry etching characteristics of the $SnO_2$ thin films was studied by varying the $O_2/BCl_3/Ar$ gas mixing ratio. We determined the optimized process conditions that were as follows: a RF power of 700 W, a DC-bias voltage of - 150 V, and a process pressure of 2 Pa. The maximum etch rate was 509.9 nm/min in $O_2/BCl_3/Ar$=(3:4:16 sccm) plasma. From XPS analysis, the etch mechanism of the $SnO_2$ thin films in the $O_2/BCl_3/Ar$ plasma can be identified as the ion-assisted chemical reaction while the role of ion bombardment includes the destruction of the metal-oxide bonds as well as the cleaning of the etched surface form the reaction products.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.19 no.12
• /
• pp.2489-2497
• /
• 1994

This paper presents the development of a 10 W solid-state hybrid power amplifier(SSPA). operating over $7.7\sim8.5GHz$. The fabrication and measurement of this amplifier are performed with 3 sections, such as the front one for high gain, the middle one for driving, and high power one, to minimize the risk of failure and to increase the easiness of development. and then the final amplifier is realized by connecting 3 sections above mentioned, DC bias circuit, and temperature compensation circuit on one housing. Total small signal gain obtained is about $45\pm1dB$, the input and output return losses are 25 and 27 dB respectively. The output power measured at 1 dB gain compression point for 3 frequencies at 7.7, 8.1, and 8.5 GHz are $39.8\sim40.4dBm$, which is about 10 W. and the 3rd-order harmonic powers of 2 tones test are 13.34 dBc at output power 37.5 dBm. These obtained results satisfies the initially required specification. and the realized SSPA can be installed as a subsystem of the microwave transponder for telecommunication.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.1A
• /
• pp.80-86
• /
• 2010

This work has been measured and analyzed the device degradation of NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOS transistors of gate channel length 0.13 [${\mu}m$]. From the relation between the variation of threshold voltage and subthreshold slop by NBTI stress, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. As a results, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress parameters of nanoscale CMOS communication circuit design.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.35C no.10
• /
• pp.30-37
• /
• 1998

An analog array with a 1.2 $\mu\textrm{m}$ double poly floating gate transistor has been developed with a standard CMOS fabrication process. The programming of each cell by means of an efficient control circuit eliminates the unnecessary erasing operation which has been widely used in conventional analog memories. It is seen that the path of the signal for both the programming and the reading is almost exactly the same since just one comparator supports both operations. It helps to eliminate the effects of the amplifier input-offset voltage problem on the output voltage for the read operation. In the array, there is no pass transistor isolating a cell of interest from the adjacent cells in the array. Instead of the extra transistors, one extra bias voltage, Vmid, is employed. The experimental results from the memory shows that the resolution of the memory is equivalent to the information content of at least six digital cells. Programming/erasing of each cell is achieved with no detectable disturbance of adjacent cells. Finally, the unique shape of the injector structure in a EEPROM is adopted as a cell of analog array. It reduces the programming voltage below the transistor breakdown voltage without any special fabrication process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1999.11a
• /
• pp.41-43
• /
• 1999

Among the feffoelectric thin films that have been widely investigated for ferroelectric random access memory (FRAM) applications, SrBi$_2$Ta$_2$$O_{9}$ thin film is appropriate to memory capacitor materials for its excellent fatigue endurance. However, very few studies on etch properties of SBT thin film have been reported although dry etching is an area that demands a great deal of attention in the very large scale integrations. In this study, the a SrBi$_2$Ta$_2$$O_{9}$ thin films were etched by using magnetically enhanced inductively coupled Ar/CHF$_3$ plasma. Etch properties, such as etch rate, selectivity, and etched profile, were measured according to gas mixing ratio of CHF$_3$(Ar$_{7}$+CHF$_3$) and the other process conditions were fixed at RF power of 600 W, dc bias voltage of 150 V, chamber pressure of 10 mTorr. Maximum etch rate of SBT thin films was 1750 A77in, under CHF$_3$(Ar+CHF$_3$) of 0.1. The selectivities of SBT to Pt and PR were 1.35 and 0.94 respectively. The chemical reaction of etched surface were investigated by X-ray photoelectron spectroscopy (XPS) analysis. The Sr and Ta atoms of SBT film react with fluorine and then Sr-F and Ta-F were removed by the physical sputtering of Ar ion. The surface of etched SBT film with CHF$_3$(Ar+CHF$_3$) of 0.1 was analyzed by secondary ion mass spectrometer (SIMS). Scanning electron microscopy (SEM) was used for examination of etched profile of SBT film under CHF$_3$(Ar+CHF$_3$) of 0.1 was about 85˚.85˚.˚.

• KIEE International Transactions on Electrophysics and Applications
• /
• v.11C no.3
• /
• pp.70-74
• /
• 2001

Admittance or impedance spectroscopy is one of the powerful tools to study dielectric relaxation and loss processes in organic and inorganic materials. In this study, the frequency dependent properties of an indium tin oxide/tris(8-hydroxyquinoline) aluminum($Alq_3$)/aluminum structure have been studied. The conductance of the $Alq_3$ film increases with the DC applied voltage up to 4V and decreases above 4V in the low frequency region. This indicates that the resistance of the device decreases with the applied bias due to the carrier injection enhancement, thereafter the injected carriers form the space charge and the additional injection of carriers is prevented. The Cole-Cole plot of the admittance takes a one-semicircle shape, which means that the device can be modeled as a parallel resistor-capacitor network. The resistance and capacitance were estimated as 8.62k${\Omega}$ and 2.7nF, respectively, at 3V in the low frequency region. The dielectric constant ( ${\epsilon}'$ ) of the $Alq_3$ film is independent of the frequency in the low frequency region below 100kHz, while the frequency dependency was observed at above 100kHz. The dielectric loss factor ( ${\epsilon}"$ ) of the $Alq_3$ film shows the dielectric dispersion below 100kHz and dielectric absorption in higher frequency domain. The dispersion is thought to be related to the hopping process of the carriers. The ${\epsilon}"$ is proportional to the reciprocal of the frequency. The dielectric relaxation time was extracted to about 0.318${\mu}s$ from the dielectric absorption spectrum.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.5
• /
• pp.378-384
• /
• 2003

Etching species in CF$_4$/Ar plasma and the behavior of etching rate of Bi$_4$-$_{x}$L$_{x}$rTi$_3$O$_2$ (BLT) films were investigated in inductively coupled plasma (ICP) reactor in terms of etch parameters. The etching rate as functions of CF$_4$ contents showed the maximum 803 $\AA$/min at 20% CF$_4$ addition in CF$_4$/Ar plasma. The increase of RF power and DC bias voltage caused to an increase of etch rate. The variation of relative volume densities for F and he atoms were measured with the optical emission spectroscopy (OES). The chemical states of BLT were investigated with using X-ray photoelectron spectroscopy (XPS). XPS narrow scan analysis shows that La-fluorides remained on the etched surface. The presence of maximum etch rate at CF$_4$(20%)/Ar(80%) may be explained by the concurrence of two etching mechanisms such as physical sputtering and chemical reaction. The roles of he ion bombardment include destruction of metal (Bi, La, Ti)-O bonds as well as assistant for chemical reaction of metals with fluorine atoms.oms.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.111-111
• /
• 2007

Further scaling the semiconductor devices down to low dozens of nanometer needs the extremely shallow depth in junction and the intentional counter-doping in the silicon gate. Conventional ion beam ion implantation has some disadvantages and limitations for the future applications. In order to solve them, therefore, plasma source ion implantation technique has been considered as a promising new method for the high throughputs at low energy and the fabrication of the ultra-shallow junctions. In this paper, we study about the effects of DC bias and base pressure as a process parameter. The diluted mixture gas (5% $PH_3/H_2$) was used as a precursor source and chamber is used for vacuum pressure conditions. After ion doping into the Si wafer(100), the samples were annealed via rapid thermal annealing, of which annealed temperature ranges above the $950^{\circ}C$. The junction depth, calculated at dose level of $1{\times}10^{18}/cm^3$, was measured by secondary ion mass spectroscopy(SIMS) and sheet resistance by contact and non-contact mode. Surface morphology of samples was analyzed by scanning electron microscopy. As a result, we could accomplish the process conditions better than in advance.

• Journal of the Semiconductor & Display Technology
• /
• v.16 no.2
• /
• pp.94-97
• /
• 2017

Amorphous Si has been used for data processing circuits in flat panel displays. However, low mobility of the amorphous Si is a limiting factor for the data transmission speed. Metal oxides such as ZnO have been studied to replace the amorphous Si. ZnO is a wide bandgap (3.3 eV) semiconductor with high mobility and good optical transparency. When ZnO is grown by sputtering with $O_2$ as an oxidizer, there can be many ion species arising from $O_2$ decomposition. $O^+$, $O_2{^+}$, and $O^-$ ions are expected to be the most abundant species, and it is not clear which one contributes to the ZnO growth. We applied alternating substrate voltage (0 V and -70 V) during sputtering growth. We studied changes in transistor characteristics induced by the voltage switching. We also compared ZnO grown by dc and rf sputtering. ZnO film was grown at $450^{\circ}C$ substrate temperature. ZnO thin-film transistor grown with these methods showed $7.5cm^2/Vsec$ mobility, $10^6$ on-off ratio, and -2 V threshold voltage.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.22 no.4
• /
• pp.67-72
• /
• 2022

This study presents the design of power amplifier (PA) in 60 nm GaN/Si HEMT technology. A customized transistor model enables the designing circuits operating at W-band. The all matching network of the PA was composed of equivalent transformer circuit to reduce matching loss. And then, equivalent transformer is several advantages without any additional inductive devices so that a wideband power characteristic can be achieved. The designed die area is 3900 ㎛ × 2300 ㎛. The designed results at center frequency achieved the small signal gain of 15.9 dB, the saturated output power (Psat) of 29.9 dBm, and the power added efficiency (PAE) of 24.2% at the supply voltage of 12 V.