• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.6
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• pp.2729-2734
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• 2011

In this paper, an active replica Low-dropout(LDO) regulator with DC voltage matching circuit is presented. In order to match the voltage between replica and output of regulator, DC voltage matching circuit is designed. The active replica low dropout regulator has higher Power Supply Rejection(PSR) than that of conventional regulator. The designed DC voltage matching circuit can reduce the drawback that may be occurred in replica regulator. And using fully active element in regulator can reduce the chip area and heat noise with resistor. As results of HSPICE simulation with 0.35um CMOS parameter, the designed active replica LDO regulator achieves Power Supply Rejection, -28@10Hz better than -17@10Hz of conventional replica regulator without DC matching circuit. And the output voltage is 3V.

• Journal of Advanced Marine Engineering and Technology
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• v.31 no.3
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• pp.293-300
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• 2007

The aim of this paper is to design a speed controller of a DC motor by selection of a PID parameters using genetic algorithm. The model of a DC motor is considered as a typical non-oscillatory, second-order system, And this paper compares three kinds of tuning methods of parameter for PID controller. One is the controller design by the genetic algorithm. second is the controller design by the model matching method third is the controller design by Ziegler and Nichols method. It was found that the proposed PID parameters adjustment by the genetic algorithm is better than the Ziegler & Nickels' method. And also found that the results of the method by the genetic algorithm is nearly same as the model matching method which is analytical method. The proposed method could be applied to the higher order system which is not easy to use the model matching method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.68 no.2
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• pp.304-309
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• 2019

This paper presents a CMOS RF-to-DC converter for video surveillance disposable IoT applications. It widely harvests RF energy of 3G/4G cellular low-band frequency range by employing a tunable impedance matching network. The proposed converter consists of the differential-drive cross-coupled rectifier and the matching network with a 4-bit capacitor array. The proposed converter is designed using 130-nm standard CMOS process. The designed energy harvester can rectify the RF signals from 700 MHz to 900 MHz. It has a peak RF-to-DC conversion efficiency of 72.25%, 64.97%, and 66.28% at 700 MHz, 800 MHz, and 900 MHz with a load resistance of 10kΩ, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.2
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• pp.146-154
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• 1989

A new design method for matching GaAs FET amplifiers using DC block consisting of non-symmetrical two-microstrip line is presented. The non-symmetrical DC block has not only the function of DC block, but the function of impedance matching. Because of the above merits the non-symmetrical DC block can be used for MIC anc MMIC. The measured frequency responses exhibit a symmetrical characteristics at the center frequency, 4(GHz).

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1001-1004
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• 2000

RFID system is applied to identify, locate and track people, cars, animals. In RFID system, the passive transponder without battery has some benefits than active transponder, such as no restriction in battery exchange and in battery’s life. But it needs auxiliary RF-DC conversion circuit. RF-DC conversion circuit originated from Wireless Power Transmission (WPT). In this paper, RF-DC conversion circuit consists of a microstrip patch antenna and impedance matching circuit, Cock-croft Walton circuit. And RF-DC conversion circuits have two kinds of T-type and Cross-type impedance matching circuits.

• ETRI Journal
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• v.28 no.3
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• pp.355-363
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• 2006

This paper presents a low-cost RF parameter estimation technique using a new RF built-in self-test (BIST) circuit and efficient DC measurement for 4.5 to 5.5 GHz low noise amplifiers (LNAs). The BIST circuit measures gain, noise figure, input impedance, and input return loss for an LNA. The BIST circuit is designed using $0.18\;{\mu}m$ SiGe technology. The test technique utilizes input impedance matching and output DC voltage measurements. The technique is simple and inexpensive.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.895-903
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• 2007

Design equations of DC blocks terminated in arbitrary impedances are newly suggested and a microstrip DC block is tested for the perfect matching. The DC block is a two-port passive component and the power excited at a port is transmitted into another port. However, all the excited power at the input can not be delivered to the output and therefore most of the conventional DC blocks can not be perfectly matched with arbitrary termination impedances. To solve the matching problem, its one-port equivalent resonant circuit model, front which design equations can be derived, is newly suggested. Using the derived design equations, any DC block can be designed, perfectly matched without any restriction of coupling coefficients. To verify the derived design equations, measurements were carried out and the results are in good agreement with prediction, showing insertion and return losses at 4.1 GHz are 0.82dB and -31dB, respectively.

• Journal of Korea Multimedia Society
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• v.16 no.4
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• pp.411-417
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• 2013

In this paper, we proposed a fast detection method of copy-move forgery image based on low frequency coefficients of the DCT coefficients. We proposed a new matching criterion of copy-moved forgery image detection (MCD) using discrete cosine transform. For each $8{\times}8$ pixel block, the DCT transform is calculated. Our algorithm uses low frequency four (DC, 3 AC coefficient) and six coefficients (DC, 5 AC coefficients) of DCT per $8{\times}8$ pixel block. Our algorithm worked block matching for DCT coefficients of the $8{\times}8$ pixel block is slid by one pixel along the image from the upper left corner to the lower right corner. Our algorithm can reduce computational complexity more than conventional copy moved forgery detection algorithms.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1429-1435
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• 2004

In this work, high performance broadband amplifier MMIC including all the matching and biasing components, and electrostatic discharge (ESD) protection circuit was developed for K/Ka band applications. Therefore, external biasing or matching components were not required for the operation of the MMIC. STO (SrTiO3) capacitors were employed to integrate the DC biasing components on the MMIC, and miniaturized LC parallel ESD protection circuit was integrated on MMIC, which increased ESD breakdown voltage from 10 to 300 V. A pre-matching technique and RC parallel circuit were used for the broadband design of the amplifier MMIC. The amplifier MMIC exhibited good RF performances and good stability in a wide frequency range. The chip size of the MMICs was $1.7{\pm}0.8$ mm2.

• Journal of Industrial Technology
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• v.30 no.A
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• pp.69-73
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• 2010

In this paper, we designed the RF-DC converter used in wireless power transmission system and studied how to design the RF-DC converter of high conversion efficiency. The RF-DC converter operate at 2.45GHz and the diode is connected with series. The RF-DC converter uses shorted stub for DC loop and matching. We can divide the RF-DC converter circuit into four blocks. The reflection coefficients between the blocks were optimized for the maximum conversion efficiency at 0 dBm input power and $1300{\Omega}$ load impedance. The final design of the RF-DC converter has a 52 percent conversion efficiency.