• 한국소음진동공학회논문집
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• 제18권2호
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• pp.224-230
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• 2008

This paper is concerned with the active vibration control of building structure by means of the active tuned mass damper and the modified positive position feedback controller. To this end, one-degree-of-freedom spring-mass-damper system equipped with ATMD is considered. The stability condition for the addressed system when applying the proposed PPF controller is derived by Routh-Hurwitz stability criterion. The stability condition shows that the modified PPF controller is absolutely stable if the controller gain is positive. so that the modified PPF controller can be used without difficulty. Theoretical study shows that the modified PPF controller can effectively suppress vibrations as the original PPF controller does in smart structure applications. To investigate the validity of the modified PPF controller, a simple experimental structure with an ATMD system driven by DC motor was built. The modified PPF control algorithm was implemented on Atmel 128 microcontroller. The experimental result shows that the modified PPF controller can also suppress vibrations for the real structure.

• 방송공학회논문지
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• 제21권2호
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• pp.261-267
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• 2016

본 논문에서는 타이밍 오프셋 보상을 위한 위상 전 왜곡 기법, 파일럿 성분 추정과 제거를 위한 직류 제거기, 송수신 신호 사이의 상관도를 기반으로 귀환 신호의 지연 시간을 추정하는 기법을 이용한 DAB(Digital Audio Broadcasting)용 간섭 제거 기반 동일 채널 중계기를 제안하고, 이를 ATSC(Advanced Television Systems Committee)시스템에 적용한다. 제안한 간섭 제거 기반의 동일 채널 중계기는 주송신 신호보다 간섭 신호가 더 큰 환경에서의 간섭 제거 능력이 확인되었으며, 이에 따라 중계기의 송출 능력의 개선, 짧은 처리 지연 시간과 더불어 양호한 신호 품질이 얻어짐을 시뮬레이션을 통하여 확인한다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 C
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• pp.1612-1614
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• 1994

Modulators Installed in PLS(Pohang Light Source) Linac are composed of a DC high voltage section, a charging section and a discharging section. PFN is charged by a resonant charging mechanism, and discharged by a switching device through the primary of the pulse transformer connected to a load. Charged PFN voltage must be well regulated to obtain stable output pulse voltage at the load. For this purpose, DCHV is controlled by a SCR controller with feedback signal, and PFN voltage is regulated by a De-Q'ing circuit. The full power operation test shows the pulse voltage regulation within ${\pm}0.13%$ with SCR feedback control alone, and within ${\pm}0.08%$ together with De-Q'ing. This paper describes the design concept and operational characteristics of the De-Q'ing circuit.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권4호
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• pp.443-450
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• 2014

This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

• Journal of Power Electronics
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• 제9권4호
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• pp.654-666
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• 2009

Direct torque control (DTC) of induction machines (IM) is a well-known strategy of these drives control which has a fast dynamic and a good tracking response. In this paper a nonlinear DTC of speed sensorless IM drives is presented which is based on input-output feedback linearization control theory. The IM model includes iron losses using a speed dependent shunt resistance which is determined through some effective experiments. A stator flux vector is estimated through a simple integrator based on stator voltage equations in the stationary frame. A novel method is introduced for DC offset compensation which is a major problem of AC machines, especially at low speeds. Rotor speed is also determined using a rotor flux sliding-mode (SM) observer which is capable of rotor flux space vector and rotor speed simultaneous estimation. In addition, stator and rotor resistances are estimated using a simple but effective recursive least squares (RLS) method combined with the so-called SM observer. The proposed control idea is experimentally implemented in real time using a FPGA board synchronized with a personal computer (PC). Simulation and experimental results are presented to show the capability and validity of the proposed control method.

• Journal of Power Electronics
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• 제15권1호
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• pp.268-277
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• 2015

In this paper, a dual-converter three-phase pulse width modulation (PWM) rectifier based on unbalanced one-cycle control (OCC) strategy is proposed. The proposed rectifier is used to eliminate the second harmonic waves of DC voltage and distortion of line currents under unbalanced input grid voltage conditions. The dual-converter PWM rectifier employs two converters, which are called positive-sequence converter and negative-sequence converter. The unbalanced OCC system compensates feedback currents of positive-sequence converter via grid negative-sequence voltages, as well as compensates feedback currents of negative-sequence converter via grid positive-sequence voltages. The AC currents of positive- and negative-sequence converter are controlled to be symmetrical. Thus, the workload of every switching device of converter is balanced. Only one conventional PI controller is adopted to achieve invariant power control. Then, the parameter tuning is simplified, and the extraction for positive- and negative-sequence currents is not needed anymore. The effectiveness and the viability of the control strategy are demonstrated through detailed experimental verification.

• Journal of Electrical Engineering and Technology
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• 제9권5호
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• pp.1780-1787
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• 2014

Arterial oxygen saturation ($SpO_2$) monitoring for newborns requires special attention in neonatal intensive care units (NICUs). Newborns have very low photo-plethysmogram (PPG) amplitudes and their body movements are difficult to contain. Hardware design and its associated signal processing algorithms should be robust enough so that faulty measurements can be avoided. In this study, improved designs were implemented to deal with low perfusion, motion artifact, and the influence of ambient light. Dynamic range was increased by using different LED intensities and a feedback system. To minimize the effects of motion artifact and to discard other unqualified data, four additional algorithms were used, which were based on dual-trace detection, continuity of DC level, morphology of PPG, and simultaneity check of $SpO_2$. Our $SpO_2$ system was tested with newborns with normal respiration in the NICU. Our system provided fast, real-time responses and 100% artifact detection was accomplished under 84% of $SpO_2$.

• ETRI Journal
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• 제27권5호
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• pp.473-483
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• 2005

In this paper, we propose two LC voltage-controlled oscillators (VCOs) that improve both phase noise and tuning range. With both 1/f induced low-frequency noise and low-frequency thermal noise around DC or around harmonics suppressed significantly by the employment of a current-current negative feedback (CCNF) loop, the phase noise in the CCNF LC VCO has been improved by about 10 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise of the CCNF VCO was measured as -112 dBc/Hz at 6 MHz offset from 5.5 GHz carrier frequency. Also, we present a bandwidth-enhanced LC VCO whose tuning range has been increased about 250 % by connecting the varactor to the bases of the cross-coupled pair. The phase noise of the bandwidth-enhanced LC-tank VCO has been improved by about 6 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise reduction has been achieved because the DC-decoupling capacitor Cc prevents the output common-mode level from modulating the varactor bias point, and the signal power increases in the LC-tank resonator. The bandwidth-enhanced LC VCO represents a 12 % bandwidth and phase noise of -108 dBc/Hz at 6 MHz offset.

• 한국ITS학회 논문지
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• 제7권3호
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• pp.74-81
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• 2008

고정밀 교류전원 제어시스템은 교통관제등과 같은 가변 부하를 운영하는데 중요하다. 이러한 시스템은 가변부하에 대응하기 위하여 제어의 정밀성이 요구되며, 이를 위하여 AC/DC/AC 변환이 가능한 인버터를 주로 사용하게 된다. 따라서 본 논문에서는 고정밀 전류제어를 수행하기 위하여 개선된 전류계측 기법을 이용한 제어시스템을 제안하였다. 제안된 계측기법은 전류의 궤환된 계측을 순시적 실효치의 이동평균법을 사용하여 응답 및 정밀성을 개선한 방식이다. 컴퓨터 시뮬레이션 및 실험의 결과는 제안된 시스템의 타당성을 입증할 수 있었으며, 이는 항공관제 유도시스템의 조명제어 장치에도 폭넓게 적용되리라 사료된다.

• Journal of Power Electronics
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• 제18권5호
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• pp.1523-1535
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• 2018

High-performance Phase-Locked Loops (PLLs) are critical for grid synchronization in grid-tied power electronic applications. In this paper, a new single-phase All Digital Phase-Locked Loop (ADPLL) is proposed. It features fast transient response and good robustness under distorted grid conditions. It is designed for Field Programmable Gate Array (FPGA) implementation. As a result, a high sampling frequency of 1MHz can be obtained. In addition, a new OSG is adopted to track the power frequency, improve the harmonic rejection and remove the dc offset. Unlike previous methods, it avoids extra feedback loop, which results in an enlarged system bandwidth, enhanced stability and improved dynamic performance. In this case, a new parameter optimization method with consideration of loop delay is employed to achieve a fast dynamic response and guarantee accuracy. The Phase Detector (PD) and Voltage Controlled Oscillator (VCO) are realized by a Coordinate Rotation Digital Computer (CORDIC) algorithm and a Direct Digital Synthesis (DDS) block, respectively. The whole PLL system is finally produced on a FPGA. A theoretical analysis and experiments under various distorted grid conditions, including voltage sag, phase jump, frequency step, harmonics distortion, dc offset and combined disturbances, are also presented to verify the fast dynamic response and good robustness of the ADPLL.