• 전기전자학회논문지
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• 제24권2호
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• pp.586-591
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• 2020

본 논문에서는 인터리브된 전류 주입형 고승압 DC-DC 컨버터가 제안된다. 높은 전압 이득 외에도 인터리빙 방식을 채택하여 낮은 리플 입력 전류가 달성된다. 또한 제안 된 컨버터의 소프트 스위칭 특성은 전력 스위치의 스위칭 손실을 줄이고 변환 효율을 높인다. 변압기의 누설 인덕턴스를 활용하여 다이오드의 전류 변화율을 제어함으로써 출력 정류기의 역 회복 문제도 완화된다. 200W 프로토 타입에서 얻은 실험 결과에 대해 설명한다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 추계학술대회 논문집 전력기술부문
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• pp.91-94
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• 2003

A DC railway system has low feeder voltage, The fault current can be smaller than the current of load starting. So it is important to discriminate between the small fault current and the load starting current. The load starting current increases step by step but the fault current increases all at once. So the type of ${\Delta}I$ relay(50F) was developed using the different characteristics between the load starting current and the fault current. As for the load starting current, the time constant of load current at each step is much smaller than that of the fault current. First, to detect faults in DC railway systems, an algorithm using the time constant calculated by the method of least squares is presented in this paper. Secondly, to compose a protection scheme for DC railway systems is presented in this paper.

• 전기전자학회논문지
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• 제17권1호
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• pp.77-82
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• 2013

본 논문에서는 인덕터의 흐르는 전류를 감지하여 출력 전압을 일정하게 유지시키는 Peak Current-mode 방식의 DC-DC Buck Converter를 제안하고, 소신호 모델링에 기초하여 Power Stage 설계 방법과 시스템의 안정도를 설계하는 방법을 제안한다. 또한, dc-dc 컨버터의 신뢰성과 성능을 향상시키기 위해 보호회로를 추가하였다. 그리고 정전기 방지를 위하여 ESD 보호회로를 제안하였다. 제안된 보호회로는 게이트-기판 바이어싱 기술을 이용하여 낮은 트리거 전압을 구현하였다. 시뮬레이션 결과는 일반적인 ggNMOS의 트리거 전압(8.2V) 에 비해 고안된 소자의 트리거 전압은 4.1V 으로 더 낮은 트리거 전압 특성을 나타냈다. 본 논문에서 제안하는 회로의 시뮬레이션은 0.35um BCB 공정 파라미터를 이용하였고, Mathworks 사의 Mathlab과 Synopsys 사의 HSPICE 프로그램을 사용하여 검증하였다.

• Journal of Power Electronics
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• 제4권2호
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• pp.87-95
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• 2004

A new fast-response high-current clamp DC-DC converter circuit design is presented that will meet the requirements and features of the new generation of microprocessors and digital systems. The clamp in the proposed converter amplifies the current in case of severe load changes and is able to produce high slew rate of output current and capability to keep constant the output voltage. This proposed high-current clamp technique is theoretically loss less, low cost and easy to implement with simple control scheme. This is modified from a basic buck topology by replacing the output inductor with two magnetically coupled inductors. Inductors are difference in inductance, one has large inductance and other has small inductance. The inductor with small inductance will take over the output inductor during fast load transient. It speedup the output current slew rate and reduce the output voltage drop in the case of heavy burden load changes.

• 한국초전도ㆍ저온공학회논문지
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• 제20권4호
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• pp.55-59
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• 2018

Currently, the development of industry makes needs larger electric supply. Providers must consider the efficiency about losses and reliability of the system. In this case, DC power system can save electrical energy; long-distance transmission line losses. Relevance to switch technology with a voltage-source converter (VSC) in AC-DC conversion system have been researched. But, protection device of DC-link against fault current is still needed to study much. VSC DC power system is vulnerable to DC-cable short-circuit and ground faults, because DC-link has a huge size of capacitor filter which releases extremely large current during DC faults. Furthermore, DC has a fatal flaw that current zero crossing is nonexistence. To interrupt the DC, several methods which make a zero crossing is used; parallel connecting self-excited series LC circuit with main switch, LC circuit with power electronic device called hybrid DC circuit breaker. Meanwhile, self-excited oscillator needs a huge size capacitor that produces big oscillation current which makes zero crossing. This capacitor has a quite effective on the price of DCCB. In this paper, hybrid self-excited type superconducting DCCB which are using AC circuit breaker system is studied by simulation tool PSCAD/EMTDC.

• 전기학회논문지
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• 제68권4호
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• pp.593-597
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• 2019

We proposed a current Interruption type DC superconducting circuit breaker(I-DC SCB), a protection device that combines the current limiting technology of a superconductor with the cut-off technology of circuit breaker. Unlike existing protective devices, the current I-DC SCB is a device that combines two protection functions, notably improving failure probability and operational reliability. It is also applicable to all DC systems, such as HV, MV, and LVDC, due to the ease in capacity increase. The 100 kV I-DC SCB was designed after taking into account the actual power system conditions, followed by an analysis of the transient characteristics and the breaking range of the limiter. The results of the analysis showed that the I-DC SCB had a fault current limit of about 75% at the rated voltage, and completed the cut-off operation within about 20 ms.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.236-236
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• 2011

본 연구 축전 결합형 고주파 플라즈마(CCP) 식각장비에 펄스 직류(Pulse DC) 전원을 인가하여 오실로스코프(oscilloscope)를 분석하여 전기적 특성을 평가하는 것이다. 펄스 직류전원 플라즈마 시스템에서는 다양한 변수를 이해하여야 한다. 본 실험에서 사용한 공정 변수는 Pulsed DC Voltage 300~500 V, Pulsed DC reverse time $0.5{\sim}2.0{\mu}s$, Pulsed DC Frequency 100~250 kHz 이었다. 실험 결과를 정리하면 1) Pulsed DC Voltage 가 증가할수록 Input voltage의 최대값은 336~520 V, 최소값은 -544~-920 V로 변하여 피크 투 피크 (peak to peak)값은 880~1460 V로 증가였다. Input current 또한 최대값은 1.88~2.88 A, 최소값은 -0.84~-1.28 A로 변하여 피크 투피크 값은 2.88~4.24 A로 증가하였다. 이는 척에 인가되는 전류와 파워의 증가를 의미한다. 2) Pulsed DC reverse time이 증가하면 Input voltage와 Input current값이 증가했다 (Input voltage의 피크 투 피크 값은 1200~1440 V, Input current의 피크 투 피크 값은 3.56~4.56 A). 3) Pulsed DC frequency가 증가하면 주기가 짧아져 Input voltage와 Input current값이 증가 한다 (Input voltage의 피크 투 피크 값은 900~1320 V, Input current의 피크 투 피크 값은 2.36~3.64 A). 결론적으로 펄스 직류 플라즈마의 다양한 전기적 변수들은 반응기 내부에 인가되는 Input voltage와 Input current의 값에 큰 영향을 준다는 것을 알 수 있었다.

• 전력전자학회논문지
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• 제21권6호
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• pp.530-537
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• 2016

This work deals with a switching method for minimizing overcurrent in a three-phase interleaved bidirectional DC-DC converter with frequency modulation. Generally, a three-phase interleaved DC-DC converter is used to reduce a current ripple component. The combined operation of three-phase and two-phase converters can significantly reduce the ripple component. However, the conventional PWM method cannot solve severe overcurrent during phase transfer or frequency variation for power control. To overcome this problem, this work proposes a new PWM switching method. A 3 kW DC-DC power converter is designed and implemented, and the converter is operated in discontinuous current mode with varying switching frequencies for power control. Simulation and experimental results show the validity of the proposed switching method. The proposed switching method can be widely used in the field of current ripple reduction for three-phase interleaved bidirectional DC-DC converters.

• 전기학회논문지
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• 제60권4호
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• pp.789-795
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• 2011

It is necessary to accurately predict converter losses for optimized design of a high-power DC-DC converter. The losses of switching devices and inductor among the elements of the converter take significantly greater proportion. The current ripple will be determined by the size of the inductance and this inductance value varies depending on the DC amount of inductor current. As the inductance changes according to load current, the change influences not only the inductor loss itself but also the total converter loss. In this paper, for more accurate design of a bi-directional DC-DC converter for 30kW-class energy storage system, more accurate computational model is proposed considering inductance variation according to the load current change. The inductance changes using variable magnetic cores are verified and converter efficiency is tested through simulations and experiments.

• Journal of Power Electronics
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• 제14권2호
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• pp.383-391
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• 2014

For the digital control of systems such as grid-connected inverters, measuring inverter output currents accurately is essential. However, current measurement offsets are inevitably generated by current measurement paths and cause DC current components in real inverter output currents. Real inverter output currents with DC components cause the DC-link capacitor voltage to oscillate at the frequency of a utility voltage. For these reasons, current measurement offsets deteriorate the overall system performance. A compensation strategy to eliminate the effect of current measurement offsets in grid-connected inverters is proposed in this study. The validity of the proposed compensation strategy is verified through simulations and experiments. Results show that the proposed compensation strategy improves the performance of grid-connected inverters.