• 제목/요약/키워드: DC bias current

검색결과 131건 처리시간 0.039초

2.45 GHz 수동형 태그 RF-ID 시스템 개발 (Development of the passive tag RF-ID system at 2.45 GHz)

  • 나영수;김진섭;강용철;변상기;나극환
    • 대한전자공학회논문지TC
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    • 제41권8호
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    • pp.79-85
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    • 2004
  • 본 논문에서는 고속 데이터 무선인식에 적용 될 2.45㎓ 수동형 RF-ID 시스템을 개발하였다. RF-ID 시스템은 수동형 태그 와 리더로 구성되어 있다. RF-ID 수동형 태그는 제로 바이어스 쇼트키 다이오드를 사용한 정류기, ID 칩, ASK 변조회로 그리고 backscatter 슬롯 안테나로 구성되어있다. 또한, ASK 변조를 위한 스위칭 소자로서 바이폴라 트랜지스터를 이용하여 저전력 소모 변조회로를 구성하였으며 태그의 슬롯 안테나는 일반 패치 안테나보다 광대역 특성을 갖는다. RF-ID 리더는 circulator를 사용하여 단일 마이크로스트립 패치 어레이 안테나를 사용하였으며 종래의 방식에서 채택하는 double-balanced mixer구조를 사용하지 않고 single-balanced mixer구조를 채택함으로서 회로의 복잡성을 개선하고 전체적인 단말기 크기를 소형화 가능하도록 설계하였다. 측정결과 동작주파수는 2.4 GHz이고 출력은 27 dBm (500 mW)에서 감지거리 1 m로 나타났다. 리더에서 측정된 변조신호는 -46.76 dBm이며 주파수는 57.2 kHz이다.

Inductively Coupled Plasma Reactive Ion Etching of MgO Thin Films Using a $CH_4$/Ar Plasma

  • Lee, Hwa-Won;Kim, Eun-Ho;Lee, Tae-Young;Chung, Chee-Won
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.77-77
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    • 2011
  • These days, a growing demand for memory device is filled up with the flash memory and the dynamic random access memory (DRAM). Although DRAM is a reasonable solution for current demand, the universal novel memory with high density, high speed and nonvolatility, needs to be developed. Among various new memories, the magnetic random access memory (MRAM) device is considered as one of good candidate memories because of excellent features including high density, high speed, low operating power and nonvolatility. The etching of MTJ stack which is composed of magnetic materials and insulator such as MgO is one of the vital process for MRAM. Recently, MgO has attracted great interest in the MTJ stack as tunneling barrier layer for its high tunneling magnetoresistance values. For the successful realization of high density MRAM, the etching process of MgO thin films should be investigated. Until now, there were some works devoted to the investigations on etch characteristics of MgO thin films. Initially, ion milling was applied to the etching of MgO thin films. However, ion milling has many disadvantages such as sidewall redeposition and etching damage. High density plasma etching containing the magnetically enhanced reactive ion etching and high density reactive ion etching have been employed for the improvement of etching process. In this work, inductively coupled plasma reactive ion etching (ICPRIE) system was adopted for the improvement of etching process using MgO thin films and etching gas mixes of $CH_4$/Ar and $CH_4$/$O_2$/Ar have been employed. The etch rates are measured by a surface profilometer and etch profiles are observed using field emission scanning emission microscopy (FESEM). The effects of gas concentration and etch parameters such as coil rf power, dc-bias voltage to substrate, and gas pressure on etch characteristics will be systematically explored.

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Effects of Etch Parameters on Etching of CoFeB Thin Films in $CH_4/O_2/Ar$ Mix

  • Lee, Tea-Young;Lee, Il-Hoon;Chung, Chee-Won
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.390-390
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    • 2012
  • Information technology industries has grown rapidly and demanded alternative memories for the next generation. The most popular random access memory, dynamic random-access memory (DRAM), has many advantages as a memory, but it could not meet the demands from the current of developed industries. One of highlighted alternative memories is magnetic random-access memory (MRAM). It has many advantages like low power consumption, huge storage, high operating speed, and non-volatile properties. MRAM consists of magnetic-tunnel-junction (MTJ) stack which is a key part of it and has various magnetic thin films like CoFeB, FePt, IrMn, and so on. Each magnetic thin film is difficult to be etched without any damages and react with chemical species in plasma. For improving the etching process, a high density plasma etching process was employed. Moreover, the previous etching gases were highly corrosive and dangerous. Therefore, the safety etching gases are needed to be developed. In this research, the etch characteristics of CoFeB magnetic thin films were studied by using an inductively coupled plasma reactive ion etching in $CH_4/O_2/Ar$ gas mixes. TiN thin films were used as a hardmask on CoFeB thin films. The concentrations of $O_2$ in $CH_4/O_2/Ar$ gas mix were varied, and then, the rf coil power, gas pressure, and dc-bias voltage. The etch rates and the selectivity were obtained by a surface profiler and the etch profiles were observed by a field emission scanning electron microscopy. X-ray photoelectron spectroscopy was employed to reveal the etch mechanism.

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비냉각 적외선 센서 어레이를 위한 CMOS 신호 검출회로 (A CMOS Readout Circuit for Uncooled Micro-Bolometer Arrays)

  • 오태환;조영재;박희원;이승훈
    • 전자공학회논문지SC
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    • 제40권1호
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    • pp.19-29
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    • 2003
  • 본 논문에서는 기존의 방법과는 달리 4 단계의 보정 기법을 적용하여 미세한 적외선 (infrared : IR) 신호를 검출해내는 비냉각 적외선 센서 어레이를 위한 CMOS 신호 검출회로를 제안한다. 제안하는 신호 검출회로는 11 비트의 A/D 변환기 (analog-to digital converter : ADC)와 7 비트의 D/A 변환기(digital to-analog converter : DAC), 그리고 자동 이득 조절 회로 (automatic gain control circuit : AGC)로 구성되며, 비냉각 센서 어레이를 동작시키는 DC 바이어스 전류 성분, 화소간의 특성 차이에 의한 변화 성분과 자체 발열 (self-heating)에 의한 변화 성분을 포함하는 적외선 센서 어레이의 출력 신호로부터 미세한 적외선 신호 성분만을 선택적으로 얻어낸다. 제안하는 A/D 변환기에서는 병합 캐패시터 스위칭(merged-capacitor switching : MCS) 기법을 적용하여 면적 및 전력 소모를 최소화하였으며, D/A 변환기에서는 출력단에 높은 선형성을 가지는 전류 반복기를 사용하여 화소간의 특성 차이에 의한 변화 성분과 자체 발열에 의한 변화 성분을 보정할 수 있도록 하였다. 시제품으로 제작된 신호 검출회로는 1.2 um double-poly double-metal CMOS 공정을 사용하였으며, 4.5 V 전원전압에서 110 ㎽의 전력을 소모한다. 제작된 시제품으로부터 측정된 검출회로의 differential nonlinearity (DNL)와 integral nonlinearity (INL)는 A/D 변환기의 경우 11 비트의 해상도에서 ±0.9 LSB와 ±1.8 LSB이며, D/A 변환기의 경우 7비트의 해상도에서 ±0.1 LSB와 ±0.1 LSB이다.

New Approaches for Overcoming Current Issues of Plasma Sputtering Process During Organic-electronics Device Fabrication: Plasma Damage Free and Room Temperature Process for High Quality Metal Oxide Thin Film

  • Hong, Mun-Pyo
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.100-101
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    • 2012
  • The plasma damage free and room temperature processedthin film deposition technology is essential for realization of various next generation organic microelectronic devices such as flexible AMOLED display, flexible OLED lighting, and organic photovoltaic cells because characteristics of fragile organic materials in the plasma process and low glass transition temperatures (Tg) of polymer substrate. In case of directly deposition of metal oxide thin films (including transparent conductive oxide (TCO) and amorphous oxide semiconductor (AOS)) on the organic layers, plasma damages against to the organic materials is fatal. This damage is believed to be originated mainly from high energy energetic particles during the sputtering process such as negative oxygen ions, reflected neutrals by reflection of plasma background gas at the target surface, sputtered atoms, bulk plasma ions, and secondary electrons. To solve this problem, we developed the NBAS (Neutral Beam Assisted Sputtering) process as a plasma damage free and room temperature processed sputtering technology. As a result, electro-optical properties of NBAS processed ITO thin film showed resistivity of $4.0{\times}10^{-4}{\Omega}{\cdot}m$ and high transmittance (>90% at 550 nm) with nano- crystalline structure at room temperature process. Furthermore, in the experiment result of directly deposition of TCO top anode on the inverted structure OLED cell, it is verified that NBAS TCO deposition process does not damages to the underlying organic layers. In case of deposition of transparent conductive oxide (TCO) thin film on the plastic polymer substrate, the room temperature processed sputtering coating of high quality TCO thin film is required. During the sputtering process with higher density plasma, the energetic particles contribute self supplying of activation & crystallization energy without any additional heating and post-annealing and forminga high quality TCO thin film. However, negative oxygen ions which generated from sputteringtarget surface by electron attachment are accelerated to high energy by induced cathode self-bias. Thus the high energy negative oxygen ions can lead to critical physical bombardment damages to forming oxide thin film and this effect does not recover in room temperature process without post thermal annealing. To salve the inherent limitation of plasma sputtering, we have been developed the Magnetic Field Shielded Sputtering (MFSS) process as the high quality oxide thin film deposition process at room temperature. The MFSS process is effectively eliminate or suppress the negative oxygen ions bombardment damage by the plasma limiter which composed permanent magnet array. As a result, electro-optical properties of MFSS processed ITO thin film (resistivity $3.9{\times}10^{-4}{\Omega}{\cdot}cm$, transmittance 95% at 550 nm) have approachedthose of a high temperature DC magnetron sputtering (DMS) ITO thin film were. Also, AOS (a-IGZO) TFTs fabricated by MFSS process without higher temperature post annealing showed very comparable electrical performance with those by DMS process with $400^{\circ}C$ post annealing. They are important to note that the bombardment of a negative oxygen ion which is accelerated by dc self-bias during rf sputtering could degrade the electrical performance of ITO electrodes and a-IGZO TFTs. Finally, we found that reduction of damage from the high energy negative oxygen ions bombardment drives improvement of crystalline structure in the ITO thin film and suppression of the sub-gab states in a-IGZO semiconductor thin film. For realization of organic flexible electronic devices based on plastic substrates, gas barrier coatings are required to prevent the permeation of water and oxygen because organic materials are highly susceptible to water and oxygen. In particular, high efficiency flexible AMOLEDs needs an extremely low water vapor transition rate (WVTR) of $1{\times}10^{-6}gm^{-2}day^{-1}$. The key factor in high quality inorganic gas barrier formation for achieving the very low WVTR required (under ${\sim}10^{-6}gm^{-2}day^{-1}$) is the suppression of nano-sized defect sites and gas diffusion pathways among the grain boundaries. For formation of high quality single inorganic gas barrier layer, we developed high density nano-structured Al2O3 single gas barrier layer usinga NBAS process. The NBAS process can continuously change crystalline structures from an amorphous phase to a nano- crystalline phase with various grain sizes in a single inorganic thin film. As a result, the water vapor transmission rates (WVTR) of the NBAS processed $Al_2O_3$ gas barrier film have improved order of magnitude compared with that of conventional $Al_2O_3$ layers made by the RF magnetron sputteringprocess under the same sputtering conditions; the WVTR of the NBAS processed $Al_2O_3$ gas barrier film was about $5{\times}10^{-6}g/m^2/day$ by just single layer.

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RF 마그네트론 스퍼터링법에 의한 $SrTiO_3$박막제조와 유전특성 (Preparation of $SrTiO_3$ Thin Film by RF Magnetron Sputtering and Its Dielectric Properties)

  • 김병구;손봉균;최승철
    • 한국재료학회지
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    • 제5권6호
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    • pp.754-762
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    • 1995
  • 차세대 LSI용 유전체 박막으로서의 응용을 목적으로 RF 마그네트론 스퍼터링법으로 Si기판위에 SrTiO$_3$박막을 제조하였다. Ar과 $O_2$혼합가스 비, 바이어스 전압변화, 열처리 온도등의 증착조건을 다양하게 변화시키며 SrTiO$_3$박막을 제조하여 최적의 증착조건을 조사하였다. 박막의 결정성을 XRD로, 박막과 Si 사이의 계면의 조성분포를 AES로 각각 분석하였다. Ar과 $O_2$의 혼합가스를 스퍼터링 가스로 사용함으로써 결정성이 좋은 박막을 얻었다. 그리고 보다 치밀한 박막을 얻고자 바이어스 전압을 걸어주며 증착시켰다. 본 실험결과에서는 스퍼터링 가스는 Ar+20% $O_2$혼합가스, 바이어스 전압은 100V에서 좋은 결정성을 얻었다. 또한 하부전극으로 Pt, 완충층으로 Ti를 사용함으로써 SrTiO$_3$막과 Si 기판과의 계면에서 SiO$_2$층의 형성을 억제할 수 있었으며, Si의 확산을 막을 수 있었다. 전류 및 유전특성을 측정하기 위해 Au/SrTiO$_3$/Pt/Ti/SiO$_2$/Si로 구성된 다층구조의 시편을 제작하였다. Pt/Ti층은 RF 스퍼터링으로, Au 전극은 DC 마그네트론 스퍼터링법으로 증착시켰다 $600^{\circ}C$로 열처리함에 의해 미세하던 결정림들이 균일하게 성장하였으며, 이에 따라 유전율이 증가하고 누설전류가 감소하였다. $600^{\circ}C$에서 열처리한 두께 300nm의 막에서 유전율은 6.4fF/$\mu\textrm{m}$$^2$이고, 비유전상수는 217이었으며, 누설전류밀도는 2.0$\times$$10^{-8}$ A/$\textrm{cm}^2$로 양질의 SrTiO$_3$박막을 제조하였다.

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$Cl_2/BCl_3$/Ar 유도 결합 플라즈마에서 온도에 따른 $ZrO_2$ 박막의 식각 (Temperature Dependence on Dry Etching of $ZrO_2$ Thin Films in $Cl_2/BCl_3$/Ar Inductively Coupled Plasma)

  • 양설;김동표;이철인;엄두승;김창일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.145-145
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    • 2008
  • High-k materials have been paid much more attention for their characteristics with high permittivity to reduce the leakage current through the scaled gate oxide. Among the high-k materials, $ZrO_2$ is one of the most attractive ones combing such favorable properties as a high dielectric constant (k= 20 ~ 25), wide band gap (5 ~ 7 eV) as well as a close thermal expansion coefficient with Si that results in good thermal stability of the $ZrO_2$/Si structure. During the etching process, plasma etching has been widely used to define fine-line patterns, selectively remove materials over topography, planarize surfaces, and trip photoresist. About the high-k materials etching, the relation between the etch characteristics of high-k dielectric materials and plasma properties is required to be studied more to match standard processing procedure with low damaged removal process. Among several etching techniques, we chose the inductively coupled plasma (ICP) for high-density plasma, easy control of ion energy and flux, low ownership and simple structure. And the $BCl_3$ was included in the gas due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. During the etching process, the wafer surface temperature is an important parameter, until now, there is less study on temperature parameter. In this study, the etch mechanism of $ZrO_2$ thin film was investigated in function of $Cl_2$ addition to $BCl_3$/Ar gas mixture ratio, RF power and DC-bias power based on substrate temperature increased from $10^{\circ}C$ to $80^{\circ}C$. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by scanning emission spectroscope (SEM). The chemical state of film was investigated using energy dispersive X-ray (EDX).

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The surface kinetic properties between $BCl_3/Cl_2$/Ar plasma and $Al_2O_3$ thin film

  • Yang, Xue;Kim, Dong-Pyo;Um, Doo-Seung;Kim, Chang-Il
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.169-169
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    • 2008
  • To keep pace with scaling trends of CMOS technologies, high-k metal oxides are to be introduced. Due to their high permittivity, high-k materials can achieve the required capacitance with stacks of higher physical thickness to reduce the leakage current through the scaled gate oxide, which make it become much more promising materials to instead of $SiO_2$. As further studying on high-k, an understanding of the relation between the etch characteristics of high-k dielectric materials and plasma properties is required for the low damaged removal process to match standard processing procedure. There are some reports on the dry etching of different high-k materials in ICP and ECR plasma with various plasma parameters, such as different gas combinations ($Cl_2$, $Cl_2/BCl_3$, $Cl_2$/Ar, $SF_6$/Ar, and $CH_4/H_2$/Ar etc). Understanding of the complex behavior of particles at surfaces requires detailed knowledge of both macroscopic and microscopic processes that take place; also certain processes depend critically on temperature and gas pressure. The choice of $BCl_3$ as the chemically active gas results from the fact that it is widely used for the etching o the materials covered by the native oxides due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. In this study, the surface reactions and the etch rate of $Al_2O_3$ films in $BCl_3/Cl_2$/Ar plasma were investigated in an inductively coupled plasma(ICP) reactor in terms of the gas mixing ratio, RF power, DC bias and chamber pressure. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by AFM and SEM. The chemical states of film was investigated using X-ray photoelectron spectroscopy (XPS), which confirmed the existence of nonvolatile etch byproducts.

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Low-Frequency Noise 측정을 통한 Bottom-Gated ZnO TFT의 문턱전압 불안정성 연구 (Analysis of the Threshold Voltage Instability of Bottom-Gated ZnO TFTs with Low-Frequency Noise Measurements)

  • 정광석;김영수;박정규;양승동;김유미;윤호진;한인식;이희덕;이가원
    • 한국전기전자재료학회논문지
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    • 제23권7호
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    • pp.545-549
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    • 2010
  • Low-frequency noise (1/f noise) has been measured in order to analyze the Vth instability of ZnO TFTs having two different active layer thicknesses of 40 nm and 80 nm. Under electrical stress, it was found that the TFTs with the active layer thickness of 80 nm shows smaller threshold voltage shift (${\Delta}V_{th}$) than those with thickness of 40 nm. However the ${\Delta}V_{th}$ is completely relaxed after the removal of DC stress. In order to investigate the cause of this threshold voltage instability, we accomplished the 1/f noise measurement and found that ZnO TFTs exposed the mobility fluctuation properties, in which the noise level increases as the gate bias rises and the normalized drain current noise level($S_{ID}/{I_D}^2$) of the active layer of thickness 80 nm is smaller than that of active layer thickness of thickness 40 nm. This result means that the 80 nm thickness TFTs have a smaller density of traps. This result correlated with the physical characteristics analysis performmed using XRD, which indicated that the grain size increases when the active layer thickness is made thicker. Consequently, the number of preexisting traps in the device increases with decreasing thickness of the active layer and are related closely to the $V_{th}$ instability under electrical stress.

마이크로 전자 기계 시스템 응용을 위한 12비트 200KHz 0.52mA $0.47mm^2$ 알고리즈믹 A/D 변환기 (A 12b 200KHz 0.52mA $0.47mm^2$ Algorithmic A/D Converter for MEMS Applications)

  • 김영주;채희성;구용서;임신일;이승훈
    • 대한전자공학회논문지SD
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    • 제43권11호
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    • pp.48-57
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    • 2006
  • 본 설계에서는 최근 부상하고 있는 motor control, 3-phase power control, CMOS image sensor 등 각종 센서 응용을 위해 고해상도와 저전력, 소면적을 동시에 요구하는 12b 200KHz 0.52mA $0.47mm^2$ 알고리즈믹 ADC를 제안한다. 제안하는 ADC는 요구되는 고해상도와 처리 속도를 얻으면서 동시에 전력 소모 및 면적을 최적화하기 위해 파이프라인 구조의 하나의 단만을 반복적으로 사용하는 알고리즈믹 구조로 설계하였다. 입력단 SHA 회로에서는 고집적도 응용에 적합하도록 8개의 입력 채널을 갖도록 설계하였고, 입력단 증폭기에는 folded-cascode 구조를 사용하여 12비트 해상도에서 요구되는 높은 DC 전압 이득과 동시에 층L분한 위상 여유를 갖도록 하였다. 또한, MDAC 커패시터 열에는 소자 부정합에 의한 영향을 최소화하기 위해서 인접 신호에 덜 민감한 3차원 완전 대칭 구조의 레이아웃 기법을 적용하였으며, SHA와 MDAC 등 아날로그 회로에는 향상된 스위치 기반의 바이어스 전력 최소화 기법을 적용하여 저전력을 구현하였다. 기준 전류 및 전압 발생기는 칩 내부 및 외부의 잡음에 덜 민감하도록 온-칩으로 집적하였으며, 시스템 응용에 따라 선택적으로 다른 크기의 기준 전압을 외부에서 인가할 수 있도록 설계하였다. 또한, 다운 샘플링 클록 신호를 통해 200KS/s의 동작뿐만 아니라, 더 적은 전력을 소모하는 10KS/s의 동작이 가능하도록 설계하였다. 제안하는 시제품 ADC는 0.18um n-well 1P6M CMOS 공정으로 제작되었으며, 측정된 DNL과 INL은 각자 최대 0.76LSB, 2.47LSB 수준을 보인다. 또한 200KS/s 및 10KS/s의 동작 속도에서 SNDR 및 SFDR은 각각 최대 55dB, 70dB 수준을 보이며, 전력 소모는 1.8V 전원 전압에서 각각 0.94mW 및 0.63mW이며, 시제품 ADC의 칩 면적은 $0.47mm^2$ 이다.