• Title/Summary/Keyword: DC Output Filter

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Improved Sliding Mode Controller for Shunt Active Power Filter

  • Sahara, Attia;Kessal, Abdelhalim;Rahmani, Lazhar;Gaubert, Jean-Paul
    • Journal of Electrical Engineering and Technology
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    • v.11 no.3
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    • pp.662-669
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    • 2016
  • In this work, nonlinear control of a three-phase shunt active power filter (SAPF) has been studied and compared to classical control based on proportional integral regulator. The control strategy is based on the direct current method using sliding mode control (SMC), where the aim is to regulate the average voltage across the dc bus of the inverter. Details are given for the control algorithm; the controller is comprised of a current loop which utilizes a hysteresis controller to generate the gating signals for the switching devices, and a nonlinear controller based on SMC law which is different from classical laws based on error between reference and measured output voltage of the inverter. Sliding surface applied in this work contains the whole of state variables, in order to ensure full control of the system behavior in the presence of disturbances that affect the supply source, the load parameters or the reference value. The designed controller offers advantage that it can gives the improvement of dynamic and static performances in cases of large disturbances. A comparison of the effects of PI control and SMC on the APF response in steady stat, under line variations, load variations, and different component variations is performed.

High Power Factor Three Phase Rectifier for High Power Density AC/DC Conversion Applications

  • Cho, J.G.;Jeong, C.Y.;Baek, J.W.;Song, D.I.;Yoo, D.W.
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.648-653
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    • 1998
  • The conventional three-phase rectifier with bulky LC output filter has been widely used in the industry because of its distinctive advantages over the active power factor correction rectifier such as simple circuit, high reliability, and low cost. Over than 0.9 power factor can be achieved, which is acceptable in most of industry applications. This rectifier, however, is not easy to use for high power density applications since the LC filter is bulky and heavy. To solve this problem, a new simple rectifier is presented in this paper. By eliminating the bulky LC filter from the conventional diode rectifier without losing most of the advantages of the conventional rectifier, very high power density power conversion with high power factor can be achieved. Operation principle and design considerations are illustrated and verified by Pspice simulation and experimental results from a prototype of 3.3 kW rectifier followed by 100KHz zero voltage switching full bridge PWM converter

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A Ripple Rejection Inherited RPWM for VSI Working with Fluctuating DC Link Voltage

  • Jarin, T.;Subburaj, P.;Bright, Shibu J V
    • Journal of Electrical Engineering and Technology
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    • v.10 no.5
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    • pp.2018-2030
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    • 2015
  • A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

A Study on Optimized PWM Strategy to Improve Output Voltage Quality of HEP System Boarded on 8200 Series Electric Locomotives (8200호대 전기기관차 객차전원공급장치(HEP)의 출력전압품질향상을 위한 최적화된 PWM 방법)

  • Lee, Eul-Jae;Lee, Jin-Kook;Youn, Cha-Joong;Kim, Jae-Moon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.11
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    • pp.1628-1632
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    • 2013
  • HEP(Head Electric Power) system, supplying 3-phase service power to the coach vehicles, is a kind of special auxiliary power equipment which is boarded on 8200 series electric locomotives in KORAIL. This equipment shares high voltage DC link with a main propulsion converter/inverter systems. It was difficult to use high frequency PWM technique so that GTO has been used as a power device same like the main power system. Due to low PWM frequency(300Hz) of HEP inverter, the output voltage has less power quality comparing to normal SIV(Static Inverter) system. In this paper, an optimal PWM strategy is presented for new IGBT type HEP inverter system. Several PWM techniques were investigated to improve output voltage quality under fixed lower filter inductance and not high PWM frequency. Finally PC simulations have been done to clarify its availability.

Comparison of Main Circuit Type Characteristics of LED Driver for Output Ripple Reduction (출력 리플 저감을 위한 LED 드라이버의 주회로 방식 특성 비교)

  • Park, Dae-Su;Kim, Tae-Kyung;Oh, Sung-Chul
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.3
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    • pp.491-499
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    • 2019
  • Recently, there has been increasing demand for power quality in power supply devices. The IEC 61000-3-2 standard requires that the AC / DC power supply for lighting meet the specifications for the power factor (PF) and total waveform distortion (THD). In addition, advanced countries in Europe are regulating the ripple rate as 15 ~ 30% for the flicker phenomenon caused by the change in the amount of foot energy due to the change in current of the output terminal. Therefore, domestic standards and regulations are being updated. This study adopted the Flyback converter to satisfy the PFC standard, and has the circuit first and second insulation function. To reduce the low frequency ripple of the LED current, Flyback, Coupled Inductor, LC parallel resonance filter, LLC resonance filter, and Cuk were simulated by PSIM to mimic each LED driving circuit. A coupled LC resonant circuit with a coupled inductor on the primary side and LC resonance on the secondary side was also proposed for output side ripple reduction.

New UWB 1:2 Power Divider with Flat In-Band Splitting and Bandpass Filtering Functions

  • Duong, Thai Hoa;Kim, Ihn-Seok
    • Journal of electromagnetic engineering and science
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    • v.10 no.1
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    • pp.28-34
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    • 2010
  • This paper introduces a new U.S. ultra-wideband(UWB: 3.1~10.6 GHz) 1:2 power divider based on a single section Wilkinson type configuration. The divider provides very flat in-band power splitting, high isolation, low insertion loss, sharp roll-off bandpass filtering, and DC blocking characteristics. The circuit consists of a $\lambda$/4 Y resonator, three capacitively coupled $\lambda$/2 short-circuited lines, and a resistor between the two output ports. The circuit structure was simulated with ADS and HFSS, and realized with low-temperature co-fired ceramic(LTCC) green tape, which has a dielectric constant of 7.8. $|S_{11}|$ better than 10 dB, $|S_{21}|$ and $|S_{31}|$ less than 3.2 dB, with both $|S_{22}|$ and $|S_{32}|$ measured as better than 12 dB for the whole UWB band. Measurement results agree closely with HFSS simulation results. The power divider has a compact size of $4\times9\times0.6mm^3$.

Two Vector Based Direct Power Control of AC/DC Grid Connected Converters Using a Constant Switching Frequency

  • Mehdi, Adel;Reama, Abdellatif;Benalla, Hocine
    • Journal of Power Electronics
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    • v.17 no.5
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    • pp.1363-1371
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    • 2017
  • In this paper, an improved Direct Power Control (DPC) algorithm is presented for grid connected three phase PWM rectifiers. The new DPC approach is based on two main tasks. First the optimization of the look-up table, which is well-known in conventional DPC, is outlined for selecting the optimum converter output voltage vectors. Secondly a very simple and effective method is used to directly calculate their duty cycles from the power errors. Therefore, the measured active and reactive powers are made to track their references using hysteresis controllers. Then two vectors are selected and applied during one control cycle to minimize both the active and reactive power ripples. The main advantages of this method are that there is no need of linear current controllers, coordinates transformations or modulators. In addition, the control strategy is able to operate at constant switching frequencies to ease the design of the power converter and the AC harmonic filter. The control exhibits a good steady state performance and improves the dynamic response without any overshoot in the line current. Theoretical principles of the proposed method are discussed. Both simulation and experimental results are presented to verify the performance and effectiveness of this control scheme.

Single-phase SRM Drive for Torque Ripple Reduction and Power Factor Improvement (토크리플 억제와 역률개선을 위한 단상 SRM의 구동시스템)

  • Ahn Jin-Woo;Liang Jianing
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.8
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    • pp.389-395
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    • 2006
  • In the single-phase switched reluctance motor (SRM) drive, the required DC source is generally supplied by the circuit consisting of bridge rectifier with diodes and many filter capacitances connected with AC source. Although the peak torque ripple of SRM is small because of large capacity of the capacitance, the charge and discharge time swhich the AC source acts on the capacitance are small and the peak current will pass on the side of source, so power factor and system efficiency decrease. Therefore a novel SRM drive system is presented in this paper, which includes drive circuit realizing reduction of torque ripple and improvement of power factor and switching topology. The proposed drive circuit consists of one switching part and diodes which can separate the output of AC/DC rectifier from the large capacitance and supply power to SRM alternately in order to realize reduction of torque ripple and improvement of power factor through the turn on and turn off of switching part. In addition, the validity of method is tested by simulation and experiment.

High Efficiency Output Filter Design and Application for High Accuracy and High Stable Switching Type MPS (고정밀, 고안정 스위칭 전자석 전원장치를 위한 고효율 출력필터의 설계 및 응용)

  • Kim, S.C.;Ha, K.M.;Huang, J.Y.;Choi, J.H.
    • Proceedings of the KIEE Conference
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    • 2006.07b
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    • pp.998-999
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    • 2006
  • 포항가속기 연구소의 선형가속기에는 22개의 솔레노이드 전자석, 16개의 사극전자석 그리고 전자빔의 궤도 조절을 위한 16개의 2극 전자석이 있다. 선형가속기의 빔을 저장링으로 공급해주는 빔 전송선에는 22개의 사극전자석과 13개의 빔 궤도 조절용 이극 전자석이 있다. 전자빔의 정밀 제어를 위하여 전자석의 전원장치는 출력전류 분해능은 16bit 이상이고 출력전류의 안정도는 최대출력에 대하여 ${\pm}50ppm$ 이하의 고정밀 고안정도가 요구된다. 이를 위하여 풀-브릿지 4상한 DC/DC 컨버터를 이용한 전자석전원장치를 개발 하였다. 전원장치의 입력전압 직류 40V이고 출력전류는 단방향 전원장치는 최대 50A/50V 이고 양방향 전원장치는 ${\pm}20A/20V$이다. 스위칭 주파수는 50 kHz이다. 전원장치의 출력부에 필터가 없으면 출력전류에는 스윗칭과 관련된 주파수 성분이 포함 되고 전자빔은 이들 주파수 성분에 대하여 영향을 받게 된다. 이러한 이유로 출력 필터의 cut-off 주파수는 5 kHz 이하가 되어야 한다. 본 논문에서는 고정밀 고안정 스윗칭 전자석전원장치를 위한 출력필터의 설계, 제작 그리고 이를 적용한 전자석전원장치에 대하여 논의 하고자 한다.

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A Study on the Fabrication Technologies for the 23 GHz 2-Stage LNA (23 GHz대 2단 저잡음 증폭기의 제작기술에 관한 연구)

  • 안동식;장동필
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.8 no.1
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    • pp.52-60
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    • 1997
  • A 23GHz 2-stage LNA was designed using MPIE numerical analysis and microwave CAD EEsof softwares. The basic circuit was designed by EEsof tools but analyzed more precisely using numerical MPIE tools and modified. The matching sections of the input and output terminals were designed with paralledl coupled filter-type lines, these matching sections perform impedance matching and DC blocking, more over have the advantages of small discontinuities and small errors in the design process. The FET chip is directly attached to the ground metal. The designed LNA gives 15.2dB gain and 2.7dB noise figure. without considering 1.8dB loss of connectors. These results validate our design process and matching schemes and fabrication technologies over the 20GHz frequency range.

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