• Journal of Broadcast Engineering
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• v.16 no.5
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• pp.793-796
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• 2011

H.264/AVC compresses video data by applying DCT transform, quantization and entropy coding processes to the residual signal obtained by inter/intra prediction. This paper proposes a method enhancing an existing DC offset adjustment technology which uses information of neighboring blocks to reduce residual information for improving coding efficiency. DC offset information is not sent over bitstreams, but calculated in the same way both in the decoder and in the encoder. Experimental results show that the proposed method enhances coding efficiency by 0.25% in average BD-Rate compared to H.264/AVC and gives better or worse coding efficiency compared to the existing DC offset method depending on video sequences with coding efficiency degradation by 0.09% in average BD-Rate. This experimental results also show that further coding efficiency improvement is possible by applying the proposed method adaptively to slice or macroblock coding units.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.825-831
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• 2016

In this paper, a transimpedance amplifier based on a new DC offset cancellation (DCOC) method is proposed for WCDMA/LTE applications. The proposed method applies a sample and hold mechanism to the conventional DCOC method with a DC feedback loop. It prevents the removal of information around the DC, so it avoids signal-to-noise ratio degradation. It also reduces area and power consumption. It was designed in a $0.13{\mu}m$ deep n-well CMOS technology and drew a maximum current of 1.58 mA from a 1.2 V supply voltage. It showed a transimpedance gain of $80dB{\Omega}$, an input-referred noise current lower than 0.9 pA/${\surd}$Hz, an out-of-band input-referred 3rd-order intercept point more than 9.5 dBm, and an output DC offset lower than 10 mV. Its area is $0.46mm{\times}0.48mm$.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1085-1092
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• 2015

In this paper, the expressions of the estimated information of a single-phase enhanced phase-locked loop (EPLL), when input signal contains harmonics and a DC offset while the fundamental component takes step changes, are derived. The theoretical analysis results indicate that in the estimated information, the n^th-order harmonics cause n+1^th-order periodic ripples, and the DC offset causes a periodic ripple at the fundamental frequency. Step changes of the amplitude, phase angle and frequency of the fundamental component cause a transient periodic ripple at twice the frequency. These periodic ripples deteriorate the performance of the EPLL. A hybrid filter based EPLL (HF-EPLL) is proposed to eliminate these periodic ripples. A delay signal cancellation filter is set at the input of the EPLL to cancel the DC offset and even-order harmonics. A sliding Goertzel transform-based filter is introduced into the amplitude estimation loop and frequency estimation loop to eliminate the periodic ripples caused by the residual input odd-order harmonics and step change of the input fundamental component. The parameter design rules of the two filters are discussed in detail. Experimental waveforms of both the conventional EPLL and the proposed HF-EPLL are given and compared with each other to verify the theoretical analysis and advantages of the proposed HF-EPLL.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.5
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• pp.866-874
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• 2008

Motor frequency can be measured by a hall sensor. Among the many hall sensors, a linear type hall sensor is good at high accuracy frequency measuring problem. However, in general, this linear type hall sensor has DC offset which can vary along sensor's operating voltage change. Therefore, In motor frequency measurement problem using the linear hall sensor, it needs an estimator that can estimate frequency and DC offset simultaneously. In this paper, we propose the least mean square estimator to estimate motor frequency. To verify its performance, we compare the LMS estimator with a commercial analog tachometer. Experimental results shows the proposed LMS estimator works well in varying frequency and stationary DC offset.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10A
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• pp.1507-1516
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• 1999

본 논문에서는 전력증폭기 선형화를 위한 Cartesian feedback 방식의 궤환 경로에서 발생하는 DC offset과 이득 및 위상 불일치를 자동적으로 보상하는 개선된 방식을 제안한다. Cartesian feedback에 의한 비선형 전력증폭기 왜곡성분의 감쇠 정도는 시스템 루프의 이득, 대역폭, 시간지연에 의해 결정된다고 알려져 있다. 그러나 궤환 경로 각 소자에서 발생하는 DC offset과 이득 및 위상의 불일치로 인하여 송신기의 출력신호에 원하지 않는 반송파 성분과 이미지 신호가 발생하여 궤환보상의 효과가 반감되는 결과를 초래한다. 본 논문에서는 디지털 신호처리 시스템 구조에서 이진 검색 (binary search) 알고리즘을 이용하여 궤환 경로에서 발생하는 DC offset과 이득 및 위상 불일치를 자동적으로 보상하는 방식을 제안하고 컴퓨터 모의실험을 통하여 제안된 방식의 성능을 분석한다. 모의실험에서 고려된 방식에 비하여 동일한 정도의 DC offset과 이득 및 위상 불일치의 보상에 걸리는 시간을 평균적으로 40% 단축할 수 있었다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.12
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• pp.1258-1268
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• 2014

In this paper, we propose and design IBFD system based on DCR. And then, we analyze effect of DC offset by self-interference in the proposed system. Also, we evaluate BER performance of the proposed system according to DC offset. As a result of the simulation, we can confirm that when the self-interference is not completely cancelled by the RF cancellation, linearity of desired signal and self-interference is distorted by DC offset. Also, in the proposed system using m-QAM modulation, DC offsets of multi-level are caused by self-interference with m-QAM modulation. As a result, constellations of desired signal and self-interference are greatly distorted. In contrast, in the proposed system using m-PSK modulation, DC offset of single level is caused by self-interference with m-PSK modulation. In this condition, we confirm that distortion of constellations of desired signal and self-interference is less than when using m-QAM modulation. That is, we can confirm that m-PSK modulation is effective than m-QAM modulation in DCR based IBFD system. Also, we can confirm that it is important to cancel self-interference as much as possible in RF-stage.

• Journal of IKEEE
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• v.23 no.4
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• pp.1140-1149
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• 2019

In general, there are various pulse width modulation(PWM) methods simply using the offset voltage injection in voltage source converter(VSC). In accordance with the AC side voltage synthesis method with the offset voltage, DC side voltage utilization factor in VSC is changed. Also, this can apply equally to the MMC system. In other words, if the DC side capacity of the high voltage DC(HVDC) transmission system is determined, the maximum reactive power which can be supplied to the AC side can be changed according to the applied output voltage synthesis method with the offset voltage. In this paper, the leg energy pulsation in MMC system according to the AC side output voltage synthesis method with offset voltage which several representative PWM are applied to are mathematically analyzed and compared with each other. Finally, the above results are verified by simulation emulating the 400MVA full-scale MMC system to determine the consistency of the mathematical analysis.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.9
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• pp.1485-1490
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• 2008

This paper proposes a new Fourier transform-based phasor estimation method to eliminate the adverse influence of the exponentially decaying dc offsets when Discrete Fourier Transform (DFT) is used to calculate the phasor of the fundamental frequency component in a relaying signal. By subtracting the result of odd-sample-set DFT from the result of even-sample-set DFT, the information of dc offsets can be obtained. Two dc offsets in a relaying signal are treated as one dc offset which is piecewise approximated in one cycle data window. The effect of the dc offsets can be eliminated by the approximated dc offset. The performance of the proposed algorithm is evaluated by using computer-simulated signals and EMTP-generated signals. The algorithm is also tested on a hardware board with TMS320C32 microprocessor. The evaluation results indicate that the proposed algorithm has the stable and accurate eliminating performance even if the input signal contains two decaying dc components having different time constants.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.3
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• pp.455-464
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• 2019

The sensorless control based on the flux linkage of PM synchronous motors has excellent position estimation characteristics at low speeds. However, a limitation arises because the integrator of flux estimator is saturated by the DC offset generated during the analog to digital conversion(ADC) process of the measured current. In order to overcome this limitation, HPF with a low cutoff frequency is used. However, the estimation performance is deteriorated (Ed- the verb deteriorate already includes the meaning of 'problem') at high speed due to the low cutoff frequency, and increasing the cutoff frequency of the HPF induces further problems of phase leading and initial starting failure at low speeds. In this paper, the cutoff frequency of HPF was synchronized to the operation frequency of the motor: at low speeds the cutoff frequency was set to low in order to reduce the phase leading of the estimated flux, and at high speeds it was set to high to raise the DC offset removal performance. As a result, the operating range was increased by 200%. Furthermore, a phase compensation algorithm is proposed to reduce the phase leading of the HPF to less than 1.5 degrees over the full operating range. The proposed sensorless control algorithm was verified by experiment with a PM synchronous motor for a washing machine.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1593-1600
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• 2015

This paper proposes a novel compensation algorithm of current offset error for single-phase linear compressor in home appliances. In a half-bridge inverter, current offset error may cause unbalanced DC-link voltage when the DC-link is comprised of two serially connected capacitors. To compensate the current measurement error, the synchronous reference frame transformation is used for detecting the measurement error. When an offset error occurs in the output current of the half-bridge inverter, the d-axis current has a ripple with frequency equal to the fundamental frequency. With the use of a proportional-resonant controller, the ripple component can be removed, and offset error can be compensated. The proposed compensation method can easily be implemented without much computation and additional hardware circuit. The validity of the proposed algorithm is verified through experimental results.