• Title/Summary/Keyword: DC Circuit

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DC Solid-State Circuit Breaker with Simple Structure (간단한 구조를 갖는 DC Solid-State Circuit Breaker)

  • Kim, Jin-Young;Choi, Seung-Soo;Kim, In-Dong;Nho, Eui-Cheol
    • Proceedings of the KIPE Conference
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    • 2013.07a
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    • pp.495-496
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    • 2013
  • 전력효율을 높일 수 있는 DC 전송이 주요 관심사가 됨에 따라 전력품질에 대한 기술이 요구된다. DC 그리드의 전력품질을 위해서는 반도체 차단기(Solid-State Circuit Breaker : SSCB)는 필수요소이다. 따라서 본 연구에서는 DC 그리드에 적용 가능한 SSCB (Solid-State Circuit Breaker : SSCB)을 제안한다. 제안한 회로는 단락 사고를 모의하고 시뮬레이션과 실험을 통해 시스템의 동작 특성을 검증하였다.

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DC Motor Drive with Circuit Balancing Technique to Reduce Common Mode Conducted Noise

  • Jintanamaneerat, Jintanai;Srisawang, Arnon;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1881-1884
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    • 2003
  • In some requirements of dc motor drive circuit applications are high quality output with generation of low internal conducted EMI. However the conventional dc motor drive circuits have been usually using unbalanced circuit which generates the high conducted EMI to the frame ground. This paper presents a balanced dc motor drive circuit which is effective way to reduce the common-mode noise. The circuit balancing is to make the noise pick up or occurring in both conductor lines, signal path and return path is equal in amplitude and opposite phase so that it will cancel out in the frame ground. The common-mode conducted noise reduction of this proposed dc motor drive is confirmed by experimental results.

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Simulation and Operation of DC/SFQ Circuit (DC/SFQ 회로의 시뮬레이션 및 작동)

  • 박종혁;정구락;임해용;한택상;강준희
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2002.02a
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    • pp.109-110
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    • 2002
  • The purpose of a superconductive DC/SFQ circuit is to produce a controlled number of picosecond single flux quantum pulses at the output when a slowly changing DC current is applied to the input. In this work, we have designed and simulated a DC/SFQ circuit based on Nb/Al$O_{x}$/Nb Josephson junction technology. From the simulation, we could obtain the margins for various circuit parameters. And also we have successfully operated a DC/SFQ circuit which was fabricated with the same design. The margin for the input bias current of the circuit was observed to be of $\pm$60%, which was very close to the simulated value.

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Integrated DC-DC Converter Based Energy Recovery Sustainer Circuit for AC-PDP

  • Park, Jae-Sung;Shin, Yong-Saeng;Hong, Sung-Soo;Han, Sang-Kyoo;Roh, Chung-Wook
    • Journal of Power Electronics
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    • v.12 no.6
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    • pp.878-885
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    • 2012
  • A new sustainer with primary-side integration of DC/DC converters and energy recovery(SPIDER) circuits is proposed. The proposed circuit operates as a DC-DC converter during address period and energy recovery circuit during sustain period. Therefore, the conventional three electronic circuits composed of the power supply, X-driver, and Y-driver can be reduced to one circuit. As a result, it has desirable advantages such as a simple structure, less mass, fewer devices and cost reduction. Moreover, since the Zero Voltage Switching (ZVS) of all power switches can be guaranteed, a switching loss can be considerably decreased. To confirm the operation, validity, and features of the proposed circuit, experimental results from a prototype for 42-inch PDP are presented.

A High Frequency-Link Bidirectional DC-DC Converter for Super Capacitor-Based Automotive Auxiliary Electric Power Systems

  • Mishima, Tomokazu;Hiraki, Eiji;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • v.10 no.1
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    • pp.27-33
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    • 2010
  • This paper presents a bidirectional DC-DC converter suitable for low-voltage super capacitor-based electric energy storage systems. The DC-DC converter presented here consists of a full-bridge circuit and a current-fed push-pull circuit with a high frequency (HF) transformer-link. In order to reduce the device-conduction losses due to the large current of the super capacitor as well as unnecessary ringing, synchronous rectification is employed in the super capacitor-charging mode. A wide range of voltage regulation between the battery and the super capacitor can be realized by employing a Phase-Shifting (PS) Pulse Width Modulation (PWM) scheme in the full-bridge circuit for the super capacitor charging mode as well as the overlapping PWM scheme of the gate signals to the active power devices in the push-pull circuit for the super capacitor discharging mode. Essential performance of the bidirectional DC-DC converter is demonstrated with simulation and experiment results, and the practical effectiveness of the DC-DC converter is discussed.

A New DC-DC Converter for Gate Driver Circuit Using Low Temperature Poly-Si TFT

  • Choi, Jin-Young;Cho, Byoung-Chul;Shim, Hyun-Sook;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1011-1014
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    • 2004
  • In this paper, we present a new DC-DC converter for gate driver circuit in low temperature poly-Si TFT technology. It is composed of a newly developed charge pump circuit and a regulator circuit. When the input voltage is 5V, the efficiency of a positive charge pump used in the DC-DC converter and that of a negative charge pump is 69.0% and 57.1%, respectively. The output voltage of DC-DC converter varies 200mV when the target voltages of DC-DC converter are 9V, -6V and the threshold voltage of TFTs varies ${\pm}$ 0.5V.

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Polarity Inversion DC/DC Power Conversion Power Supply with High Voltage Step-up Ratio (고전압 변환비치 극성 반전형 DC/DC 전력 변환 전원장치)

  • Jung, Dong-Yeol;Jung, Yong-Joon;Hong, Sung-Soo;Han, Sang-Kyoo;SaKong, Sug-Chin;Roh, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.13 no.3
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    • pp.196-205
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    • 2008
  • A noble polarity inversion dc/dc power conversion circuit that has the high input-output voltage conversion ration characteristics is presented for high voltage DC power supply applications. The proposed circuit features the reduced voltage stresses of the component compared to those of the conventional ones. The operational principles of the proposed circuit is analyzed and comparative features are presented. The simulation results and experimental results are presented to verify the validity of the proposed circuit.

A Characteristic Analysis of Resonant Voltage Resultant Type DC/DC Converter (공진 전압 합성형 DC/DC 컨버터의 특성해석)

  • Hwang, Gye-Ho;Kim, Jong-Hae;Nam, Seung-Sik;Kim, Dong-Hui;Jeong, Do-Yeong;O, Seung-Hun
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.49 no.1
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    • pp.40-47
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    • 2000
  • This paper presents a circuit of resonant voltage resultant type DC/DC converter consists of two unit half-bridge high frequency resonant inverters, and describes operating modes, principle and analysis of the proposed circuit. Also, the analysis of the proposed circuit has generally described by using normalized parameters. Based on the characteristic values, a method of the circuit design is proposed. According to phase shift, the output voltage of the proposed circuit can be controlled. In addition, the justification of theoretical analysis was certified by comparing to the experimental waveforms. In the future, this proposed converter show that it can be practically used as the system of fixed DC voltage source etc.

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Design of Low-Area DC-DC Converter for 1.5V 256kb eFlash Memory IPs (1.5V 256kb eFlash 메모리 IP용 저면적 DC-DC Converter 설계)

  • Kim, YoungHee;Jin, HongZhou;Ha, PanBong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.15 no.2
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    • pp.144-151
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    • 2022
  • In this paper, a 1.5V 256kb eFlash memory IP with low area DC-DC converter is designed for battery application. Therefore, in this paper, 5V NMOS precharging transistor is used instead of cross-coupled 5V NMOS transistor, which is a circuit that precharges the voltage of the pumping node to VIN voltage in the unit charge pump circuit for the design of a low-area DC-DC converter. A 5V cross-coupled PMOS transistor is used as a transistor that transfers the boosted voltage to the VOUT node. In addition, the gate node of the 5V NMOS precharging transistor is made to swing between VIN voltage and VIN+VDD voltage using a boost-clock generator. Furthermore, to swing the clock signal, which is one node of the pumping capacitor, to full VDD during a small ring oscillation period in the multi-stage charge pump circuit, a local inverter is added to each unit charge pump circuit. And when exiting from erase mode and program mode and staying at stand-by state, HV NMOS transistor is used to precharge to VDD voltage instead of using a circuit that precharges the boosted voltage to VDD voltage. Since the proposed circuit is applied to the DC-DC converter circuit, the layout area of the 256kb eFLASH memory IP is reduced by about 6.5% compared to the case of using the conventional DC-DC converter circuit.

Analysis of Operation Characteristics of DC Circuit Breaker with Superconducting Current Limiting Element (초전도 전류제한소자를 적용한 DC 차단기의 동작 특성 분석)

  • Jung, Byung-Ik
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.6
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    • pp.1069-1074
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    • 2020
  • Since DC has no zero point, an arc occurs when the DC circuit breaker performs a shutdown operation. In this case, a fatal accident may occur in the circuit breaker or in the grid, depending on the magnitude of the arc. Therefore, the shutdown performance and the reliability of the circuit breaker are important in the commercialization of HVDC. In this study, a superconducting LC circuit breaker was proposed to improve the performance and the reliability of the DC circuit breaker. The superconducting LC circuit breaker applied a superconducting coil to the inductor of the existing LC circuit breaker. Other than limiting the initial fault current, it also creates a stable zero point in the event of a fault current. To verify this, simulation was performed through EMTDC/PSCAD. Furthermore, the superconducting LC circuit breaker was compared with the LC circuit breaker with a normal coil. As a result, it was found that the LC circuit breaker with the superconducting coil limited the initial fault current further by approximately 12 kA compared to the LC circuit breaker with a normal coil. This reduced the arc extinguish time by approximately 0.16 sec, thereby decreasing the elctrical power burden on the circuit breaker.