• Title/Summary/Keyword: DC Circuit

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Reconfigurable Polarization Patch Antenna with Y-Shaped Feed (Y형태의 급전 구조를 이용한 편파 변환 재구성 패치 안테나)

  • Lee, Da-Ae;Sung, Youngje
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.1
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    • pp.1-9
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    • 2014
  • In this paper, a reconfigurable polarization patch antenna that uses a Y-shaped feed is proposed. The proposed antenna consists of a square patch, a Y-shaped feeding structure, a PIN diode, and a bias circuit for diode operation. The structural symmetry/asymmetry of the feeding structure is determined by the on/off operation of the PIN diode that inserted into the side of one of the lines of the Y-shaped feeding structure. For the proposed reconfigurable antenna, the two microstrip lines of the feeding structure have the same length when the PIN diode operates in the on state, and the antenna exhibits linear polarization(LP). On the other hand, when the PIN diode operates in the off state, the length of one side line of the feeding structure is relatively shorter than that of the other line. Therefore, the antenna exhibits circular polarization(CP). From the measurement results, it is found that the proposed antenna exhibits good impedance matching and axial ratio. In addition, polarization switching can be easily achieved in the same operating band.

A New Switching Strategy for PWM Voltage Source Inverters (PWM 전압원 인버터의 새로운 스위칭 방법)

  • Jo, Gyu-Min;Gang, Wan-Sik;Kim, Nam-Jeong
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.37 no.3
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    • pp.84-93
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    • 2000
  • In PWM voltage source inverters operated by conventional switching method, the dead time is inserted in switching signals to prevent tile short circuit of the DC voltage source. The dead time causes detrimental effects to the control performance of the inverter system. So we need to compensate the dead time effects. And the dead time minimization switching method can be considered as the best way to avoid the dead time effects fundamentally. In this paper, a new switching strategy is proposed which is a kind of dead time minimization switching methods. According to the proposed switching method, very short dead time is adopted in only once when the current polarity is changing. And the adopted dead time is equal to the turn off time of the swtiching device or shorter than it. As the proposed method can be done with the polarity information of the reference current in case that the output current of the inverter is controlled, it is easy to solve some problems in comparison with the case that the real current is used to get the polarity changing time; level detection difficulty, noise problem and so on

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Design of Ku-Band BiCMOS Low Noise Amplifier (Ku-대역 BiCMOS 저잡음 증폭기 설계)

  • Chang, Dong-Pil;Yom, In-Bok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.2
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    • pp.199-207
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    • 2011
  • A Ku-band low noise amplifier has been designed and fabricated by using 0.25 um SiGe BiCMOS process. The developed Ku-band LNA RFIC which has been designed with hetero-junction bipolar transistor(HBT) in the BiCMOS process have noise figure about 2.0 dB and linear gain over 19 dB in the frequency range from 9 GHz to 14 GHz. Optimization technique for p-tap value and electro-magnetic(EM) simulation technique had been used to overcome the inaccuracy in the PDK provided from the foundry service company and to supply the insufficient inductor library. The finally fabricated low noise amplifier of two fabrication runs has been implemented with the size of $0.65\;mm{\times}0.55\;mm$. The pure amplifier circuit layout with the reduced size of $0.4\;mm{\times}0.4\;mm$ without the input and output RF pads and DC bais pads has been incorporated as low noise amplication stages in the multi-function RFIC for the active phased array antenna of Ku-band satellite VSAT.

Development of High Stable Instrumentation and Analytic Techniques for Radioactive Pulses (방사선 펄스의 고안정 계측 및 분석기술 개발)

  • 길경석;송재용;한주섭;김일권;손원진
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.2
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    • pp.303-308
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    • 2001
  • An objection of this study is to develop a high stable measuring circuits and a analytic system for radioactive pulses. The proposed system consists of a pulse detection units for neutrons and gamma-rays a programmable high voltage supply unit and a digital signal processor. The programmable high voltage supply unit designed can generate DC voltage up to 1,500 V at 5 V input and have a series voltage regulator to maintain the output voltage constantly, resulting in less than 1.63% of voltage regulation. The pulse detection parts consists of an active integrator, a pole-zero circuit, and a 3-stage amplifier of 60 dB, and its frequency bandwidth is from 37 Hz to 300 kHzAlso, pulse height distribution in accordance with pulse counts is important data in analyzing radioactive pulses. In this study, A/D convertor (12bit, 100ms) and DSP (TMS320C31-60) are used to analyze the pulse height, and the analytic system is designed to be operated in PC-base.

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The Degradation Analysis of Characteristic Parameters by NBTI stress in p-MOS Transistor for High Speed (고속용 p-MOS 트랜지스터에서 NBTI 스트레스에 의한 특성 인자의 열화 분석)

  • Lee, Yong-Jae;Lee, Jong-Hyung;Han, Dae-Hyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.1A
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    • pp.80-86
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    • 2010
  • This work has been measured and analyzed the device degradation of NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOS transistors of gate channel length 0.13 [${\mu}m$]. From the relation between the variation of threshold voltage and subthreshold slop by NBTI stress, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. As a results, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress parameters of nanoscale CMOS communication circuit design.

Preprocessing Stage of Timing Simulator, TSIM1.0 : Partitioning and Dynamic Waveform Storage Management (Timing Simulator인 TSIM1.0에서의 전처리 과정 : 회로분할과 파형정보처리)

  • Kwon, Oh-Bong;Yoon, Hyun-Ro;Lee, Ki-Jun
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.3
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    • pp.153-159
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    • 1989
  • This paper describes the algorithms employed in the preprocessing stage of the timing simulator, TSIM1.0, which is based on the Waveform Relaxation Method (WRM) at the CELL-level. The preprocessing stage in TSIM1.0 (1)partitions a given circuit into DC connected blocks (DCB's) (2) forms strongly connected circuts (SCC's) and (3) orders CELL's Also, the efficient waveform management technique for the WRM is described, which allows the overwriting of the waveform management technique for the WRM is described. which allows the overwriting of the waveform information to save the storage requirements. With TSIM1.0, circuits containing up to 5000 MOSFET's can be analyzed within 1 hour computation time on the IBM PC/AT. The simulation results for several types of MOS digital circuits are given to verify the performance of TSIM1.0.

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Design of an Analog Array Using Floating Gate MOSFETs (부유게이트를 이용한 아날로그 어레이 설계)

  • 채용웅;박재희
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.10
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    • pp.30-37
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    • 1998
  • An analog array with a 1.2 $\mu\textrm{m}$ double poly floating gate transistor has been developed with a standard CMOS fabrication process. The programming of each cell by means of an efficient control circuit eliminates the unnecessary erasing operation which has been widely used in conventional analog memories. It is seen that the path of the signal for both the programming and the reading is almost exactly the same since just one comparator supports both operations. It helps to eliminate the effects of the amplifier input-offset voltage problem on the output voltage for the read operation. In the array, there is no pass transistor isolating a cell of interest from the adjacent cells in the array. Instead of the extra transistors, one extra bias voltage, Vmid, is employed. The experimental results from the memory shows that the resolution of the memory is equivalent to the information content of at least six digital cells. Programming/erasing of each cell is achieved with no detectable disturbance of adjacent cells. Finally, the unique shape of the injector structure in a EEPROM is adopted as a cell of analog array. It reduces the programming voltage below the transistor breakdown voltage without any special fabrication process.

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High Power Factor Converter for Electric Vehicle Chargers (전기자동차 충전기용 고역율 콘버어터 회로)

  • 김영민;이수원;모창호;유철로
    • The Transactions of the Korean Institute of Power Electronics
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    • v.2 no.1
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    • pp.33-38
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    • 1997
  • Generally, various semiconductor switching devices for power systems are used in battery chargers for electric vehicle. When these used, it takes the problems of transient-current or distortion of waveforms in power systems near by battery chargers because of harmonics and large peak-current, low power factor, etc., caused by the non-linearity of these devices. Recently, power factor control, line current peak-cut, harmonics reduction which was ignored in past is more and more important. In this paper, to solve those problems we will improve the characteristics of voltage rising and propose the high power factor converter circuit for battery chargers. Our proposed system convert commutated voltage to AC resonant wave in high frequency inverter and rectify the link voltages passed high-frequency transformer and transfer the DC voltages. Especially, the effect using these converter system can be improved very large by power factor control and we have to verify the possibilities of improvement through the experiment of Pb-Acid battery application.

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Design of pillow type contactless recharging device for totally implantable middle ear systems (완전 이식형 인공중이를 위한 베개형 비접촉 충전장치의 설계)

  • Lim, Hyung-Gyu;Kim, Jong-Min;Kim, Min-Kyu;Yoon, Young-Ho;Park, Il-Yong;Song, Byung-Seop;Cho, Jin-Ho
    • Journal of Sensor Science and Technology
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    • v.14 no.2
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    • pp.78-84
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    • 2005
  • A contactless recharging device for totally implantable middle ear systems has been designed as a pillow type that the user can recharge the implanted battery with taking a rest. The proposed device uses the electromagnetic coupling between the transmitting coil and the receiving coil. To supply sufficient power for the implanted circuits, each coil uses LC resonance and the implanted device uses voltage doubler. A power MOSFET is used for switching the DC voltage of LC parallel circuit and the switching frequency demands on a programmable frequency generator which is controlled by microcontroller. In order to improve the electromagnetic coupling efficiency at specific positions of coil which may vary with the displacement of head, the optimal location of receiving coil was studied, and the 5 transmitting coils in a pillow for recharging the implant module was designed. From such a recharging experiment, it was found that the proposed device could provide the sufficient operating voltage within the distance of 4 cm between pillow and the implanted device.

Electronic Ballast for Metal Halide Lamps Using High Frequency Modulation Method (고주파 변조방법을 이용한 메탈할라이드 램프용 전자식 안정기)

  • 오덕진;문태환;조규민;김희준
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.5
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    • pp.438-445
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    • 2001
  • This paper presents a high frequency modulation electronic ballast for the metal halide lamp. As the proposed ballast operates in high frequency ranges and can start up the lamp using the LC resonant circuit without external igniter, the proposed ballast is very compact and has a good efficiency in comparison with the conventional low frequency electronic ballast. The proposed ballast is controlled with the modulated frequency in the range of 20kHz to 100kHz in order to avoid the acoustic resonance phenomenon. In this paper, a new realtime acoustic resonance detection method is proposed to evaluate the characteristics of the ballast. The no load protection algorithm and power control algorithm through the detection of the DC link current are described. Finally, the experimental results on the proto-type ballast of 150w metal halide lamp with the proposed methods are discussed.

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