• Title/Summary/Keyword: DC Capacitors

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Life Estimation of Electrolytic Capacitors for Inverters (인버터용 전해커패시터의 수명 추정)

  • Lee, Dong-Choon;Kim, Hyung-Jin
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.50 no.7
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    • pp.338-346
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    • 2001
  • In this paper, dc link currents for the three-phase diode rectifiers and PWM inverters are analyzed and an algorithm of estimating the life of dc link electrolytic capacitors using the analyzed ripple current is presented. Since the capacitor life is dependent on the operating temperature, the power dissipation in capacitors should be calculated. For this, the ESR(equivalent series resistance) model of the capacitor is derived and ripple currents through the capacitor are analyzed. Relating the power dissipation and the heat transfer equation, the internal operating temperature is calculated. Then, the capacitor life can be predicted by using Arrhenius's equation. An example for applications is given for the practical system.

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Single-Phase Multifunctional Onboard Battery Charger with Small DC-link Capacitors (작은 직류링크 커패시터를 갖는 단상 다기능 온보드 배터리 충전기)

  • Nguyen, Hoang Vu;Lee, Dong-Choon
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.186-188
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    • 2018
  • In this paper, a single-phase multifunctional onboard battery charger with small DC-link capacitors is proposed, where the low-voltage battery charger is utilized as an active power filter to mitigate the inherent second-order ripple power when the high-voltage (HV) battery is charged from the grid. In this scheme, the large DC-link electrolytic capacitors of the HV battery charger can be eliminated without additional switches, leading to the reduction of cost and volume of the onboard battery charger. The validity of the proposed topology has been verified by the simulation results.

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A development of Diagnosis Monitoring System for UPS DC Link Capacitors using Zigbee Wireless Communication (Zigbee 무선통신을 이용한 UPS DC링크 커패시터의 고장 모니터링 시스템 개발)

  • Kim, Dong-Jun;Shon, Jin-Geun;Jeon, Hee-Jong
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.61 no.1
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    • pp.41-46
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    • 2012
  • Electrolytic power capacitors have been widely used in power conversion system such as inverter or UPS because of characteristics of large capacitance, high-voltage and low-cost. The electrolytic capacitor, which is most of the time affected by the aging effect, plays a very important role for the power-electronics system quality and reliability. Therefore it is important to diagnosis monitoring the condition of an electrolytic capacitor in real-time to predict the failure. In this paper, the on-line remote diagnosis monitoring system for UPS DC link electrolytic capacitors using low-cost single-chip zigbee communication modules is developed. To estimate the health status of the capacitor, the equivalent series resistor(ESR) of the component has to be determined. The capacitor ESR is estimated by using RMS computation using BPF modeling of DC link ripple voltage/current. Zigbee-based hardware experimental results show that the proposed remote capacitor diagnosis monitoring system can be applied to UPS successfully.

Practical Design and Implementation of a Power Factor Correction Valley-Fill Flyback Converter with Reduced DC Link Capacitor Volume (저감된 DC Link Capacitor 부피를 가지는 역률 개선 Valley-Fill Flyback 컨버터의 설계 및 구현)

  • Kim, Se-Min;Kang, Kyung-Soo;Kong, Sung-Jae;Yoo, Hye-Mi;Roh, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.22 no.4
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    • pp.277-284
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    • 2017
  • For passive power factor correction, the valley fill circuit approach is attractive for low power applications because of low cost, high efficiency, and simple circuit design. However, to vouch for the product quality, two dc-link capacitors in the valley fill circuit should be selected to withstand the peak rectified ac input voltage. The common mode (CM) and differential mode (DM) choke should be used to suppress the electromagnetic interference (EMI) noise, thereby resulting in large size volume product. This paper presents the practical design and implementation of a valley fill flyback converter with reduced dc link capacitors and EMI magnetic volumes. By using the proposed over voltage protection circuit, dc-link capacitors in the valley fill circuit can be selected to withstand half the peak rectified ac input voltage, and the proposed CM/DM choke can be successfully adopted. The proposed circuit effectiveness is shown by simulation and experimentally verified by a 78W prototype.

A Control Scheme for Quality Improvement of Input-Output Current of Small DC-Link Capacitor Based Three-Level NPC Inverters (소용량 직류단 커패시터를 가지는 3-레벨 NPC 인버터의 입-출력 전류 품질 향상을 위한 제어 기법)

  • In, Hyo-Chul;Kim, Seok-Min;Park, Seong-Soo;Lee, Kyo-Beum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.22 no.4
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    • pp.369-372
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    • 2017
  • This paper presents a control scheme for three-level NPC inverters using small DC-link capacitors. To reduce the inverter system volume, the film capacitor with small capacitance is a promising candidate for the DC-link. When small capacitors are applied in a three level inverter, however, the AC ripple component increases in the DC-link NPV (neutral point voltage). In addition, the three-phase input grid currents are distorted when the DC-link capacitors are fed by diode rectifier. In this paper, the additional circuit is applied to compensate for small capacitor systems defect, and the offset voltage injection method is presented for the stabilization in NPV. These two proposed processes evidently ensure the quality improvement of the input grid currents and output load currents. The feasibility of the proposed method is verified by experimental results.

Estimation of ESR in the DC-Link Capacitors of AC Motor Drive Systems with a Front-End Diode Rectifier

  • Nguyen, Thanh Hai;Le, Quoc Anh;Lee, Dong-Choon
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.411-418
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    • 2015
  • In this paper, a new method for the online estimation of equivalent series resistances (ESR) of the DC-link capacitors in induction machine (IM) drive systems with a front-end diode rectifier is proposed, where the ESR estimation is conducted during the regenerative operating mode of the induction machine. In the first place, a regulated AC current component is injected into the q-axis current component of the induction machine, which induces the current and voltage ripple components in the DC-link. By processing these AC signals through digital filters, the ESR can be estimated by a recursive least squares (RLS) algorithm. To acquire the AC voltage across the ESR, the DC-link voltage needs to be measured at a double sampling frequency. In addition, the ESR current is simply reconstructed from the stator currents and switching states of the inverter. Experimental results have shown that the estimation error of the ESR is about 1.2%, which is quite acceptable for condition monitoring of the capacitor.

Single Phase Grid Connected Voltage-ed Inverter Utilizing a Power Decoupling Function (전력 디커플링 기능을 가진 단상 계통연계 전압형 인버터)

  • Lee, Sang-Wook;Mun, Sang-Pil;Park, Han-Seok
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.66 no.4
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    • pp.236-241
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    • 2017
  • This paper presents a single-phase grid connected voltage-ed inverter with a power decoupling circuit. In the single-phase grid connected voltage-ed inverter, it is well known that a power pulsation with twice the grid frequency is contained in the input power. In a conventional voltage type inverter, electrolytic capacitors with large capacitance have been used in order to smooth the DC voltage. However, lifetime of those capacitors is shortened by the power pulsation with twice grid frequency. The authors have been studied a active power decoupling(APD) method that reduce the pulsating power on the input DC bus line, this enables to transfer the ripple energy appeared on the input DC capacitors into the energy in a small film capacitor on the additional circuit. Hence, extension of the lifetime of the inverter can be expected because the small film capacitor substitutes for the large electrolytic capacitors. Finally, simulation and experimental results are discussed.

Single Phase Five Level Inverter For Off-Grid Applications Constructed with Multilevel Step-Up DC-DC Converter (멀티레벨 승압 DC-DC 컨버터와 구성된 독립형 부하를 위한 단상 5레벨 인버터)

  • Anvar, Ibadullaev;Park, Sung-Jun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.4
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    • pp.319-328
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    • 2020
  • The recent use of distributed power generation systems constructed with DC-DC converters has become extremely popular owing to the rising need for environment friendly energy generation power systems. In this study, a new single-phase five-level inverter for off-grid applications constructed with a multilevel DC-DC step-up converter is proposed to boost a low-level DC voltage (36 V-64 V) to a high-level DC bus (380 V) and invert and connect them with a single-phase 230 V rms AC load. Compared with other traditional multilevel inverters, the proposed five-level inverter has a reduced number of switching devices, can generate high-quality power with lower THD values, and has balanced voltage stress for DC capacitors. Moreover, the proposed topology does not require multiple DC sources. Finally, the performance of the proposed topology is presented through the simulation and experimental results of a 400 W hardware prototype.

A Low-Noise and Small-Size DC Reference Circuit for High Speed CMOS A/D Converters

  • Hwang, Sang-Hoon;Song, Min-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.1
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    • pp.43-50
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    • 2007
  • In a high-speed flash style or a pipelining style analog-to-digital converter (A/D converter), the DC reference fluctuation caused by external noises becomes serious, as the sampling frequency is increased. To reduce the fluctuations in conventional A/D converters, capacitors have been simply used, but the layout area was large. Instead of capacitors, a low-noise and small-size DC reference circuit based on transmission gate (TG) is proposed in this paper. In order to verify the proposed technique, we designed and manufactured a 6-bit 2GSPS CMOS A/D converter. The A/D converter is designed with a 0.18um 1-poly 6-metal n-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies the chip area of 977um by 1040um. The measured result shows that SNDR is 36.25 dB and INL/DNL is within 0.5LSB, even though the DC reference fluctuation is serious.

Failure Prediction Monitoring of DC Electrolytic Capacitors in Half-bridge Boost Converter (단상 하프-브리지 부스트 컨버터에서 DC 전해 커패시터의 고장예측 모니터링)

  • Seo, Jang-Soo;Shon, Jin-Geun;Jeon, Hee-Jong
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.63 no.4
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    • pp.345-350
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    • 2014
  • DC electrolytic capacitor is widely used in the power converter including PWM inverter, switching power supply and PFC Boost converter system because of its large capacitance, small size and low cost. In this paper, basic characteristics of DC electrolytic capacitor vs. frequency is presented and the real-time estimation scheme of ESR and capacitance based on the bandpass filtering is adopted to the single phase boost converter of uninterruptible power supply to diagnose its split dc-link capacitors. The feasibility of this real-time failure prediction monitoring system is verified by the computer simulation of the 5[kW] singe phase PFC half-bridge boost converter.